From 125939ff65b8f5832342dbccb590cf111f9fff27 Mon Sep 17 00:00:00 2001 From: Craig Topper Date: Tue, 6 Dec 2016 08:08:01 +0000 Subject: [PATCH] [X86] Add test case that shows a scalar sqrtsd intrinsic of a 128-bit vector load using the load form of the sqrtsd instruction which violates the intrinsic semantics. The sqrtsd instruction only loads 64-bits and writes bits 63:0 with the sqrt result. Bits 127:64 are preserved in the destination register. The semantics of the intrinsic indicate bits 127:64 should come from the intrinsic argument which in this case is a 128-bit load. So the generated code should have a 128-bit load and use a register form of sqrtsd. llvm-svn: 288780 --- llvm/test/CodeGen/X86/sse2-intrinsics-x86.ll | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/llvm/test/CodeGen/X86/sse2-intrinsics-x86.ll b/llvm/test/CodeGen/X86/sse2-intrinsics-x86.ll index 1a78729..22f25c19 100644 --- a/llvm/test/CodeGen/X86/sse2-intrinsics-x86.ll +++ b/llvm/test/CodeGen/X86/sse2-intrinsics-x86.ll @@ -1500,6 +1500,32 @@ define <2 x double> @test_x86_sse2_sqrt_sd(<2 x double> %a0) { declare <2 x double> @llvm.x86.sse2.sqrt.sd(<2 x double>) nounwind readnone +define <2 x double> @test_x86_sse2_sqrt_sd_vec_load(<2 x double>* %a0) { +; SSE-LABEL: test_x86_sse2_sqrt_sd_vec_load: +; SSE: ## BB#0: +; SSE-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04] +; SSE-NEXT: sqrtsd (%eax), %xmm0 ## encoding: [0xf2,0x0f,0x51,0x00] +; SSE-NEXT: retl ## encoding: [0xc3] +; +; AVX2-LABEL: test_x86_sse2_sqrt_sd_vec_load: +; AVX2: ## BB#0: +; AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04] +; AVX2-NEXT: vmovaps (%eax), %xmm0 ## encoding: [0xc5,0xf8,0x28,0x00] +; AVX2-NEXT: vsqrtsd %xmm0, %xmm0, %xmm0 ## encoding: [0xc5,0xfb,0x51,0xc0] +; AVX2-NEXT: retl ## encoding: [0xc3] +; +; SKX-LABEL: test_x86_sse2_sqrt_sd_vec_load: +; SKX: ## BB#0: +; SKX-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04] +; SKX-NEXT: vmovaps (%eax), %xmm0 ## encoding: [0x62,0xf1,0x7c,0x08,0x28,0x00] +; SKX-NEXT: vsqrtsd %xmm0, %xmm0, %xmm0 ## encoding: [0xc5,0xfb,0x51,0xc0] +; SKX-NEXT: retl ## encoding: [0xc3] + %a1 = load <2 x double>, <2 x double>* %a0, align 16 + %res = call <2 x double> @llvm.x86.sse2.sqrt.sd(<2 x double> %a1) ; <<2 x double>> [#uses=1] + ret <2 x double> %res +} + + define i32 @test_x86_sse2_ucomieq_sd(<2 x double> %a0, <2 x double> %a1) { ; SSE-LABEL: test_x86_sse2_ucomieq_sd: ; SSE: ## BB#0: -- 2.7.4