From 1245c6e2582cb67db2a84e60a61cfe5a8d77e068 Mon Sep 17 00:00:00 2001
From: =?utf8?q?Pali=20Roh=C3=A1r?= <pali@kernel.org>
Date: Tue, 5 Apr 2022 15:12:35 +0200
Subject: [PATCH] powerpc: mpc85xx: Define linker sections in ascending order
MIME-Version: 1.0
Content-Type: text/plain; charset=utf8
Content-Transfer-Encoding: 8bit

It is too confusing if sections are defined in non-ascending order.

Also linker has to go backward and then again forward when generating final
binary.

To make future changes easier, define all linker sections in ascending
order.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
---
 arch/powerpc/cpu/mpc85xx/u-boot-spl.lds | 20 +++++++++++---------
 arch/powerpc/cpu/mpc85xx/u-boot.lds     | 15 ++++++++-------
 2 files changed, 19 insertions(+), 16 deletions(-)

diff --git a/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds b/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds
index 27a5fe6..1b4d1e0 100644
--- a/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds
+++ b/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds
@@ -18,6 +18,13 @@ PHDRS
 #endif
 SECTIONS
 {
+/* For ifc, elbc, esdhc, espi, all need the SPL without section .resetvec */
+#ifdef CONFIG_SYS_MPC85XX_NO_RESETVEC
+	.bootpg IMAGE_TEXT_BASE - 0x1000 :
+	{
+		KEEP(*(.bootpg))
+	} :text = 0xffff
+#endif
 	. = IMAGE_TEXT_BASE;
 	.text : {
 		*(.text*)
@@ -67,18 +74,13 @@ SECTIONS
 	__bss_end = .;
 #endif
 
-/* For ifc, elbc, esdhc, espi, all need the SPL without section .resetvec */
-#ifdef CONFIG_SYS_MPC85XX_NO_RESETVEC
-	.bootpg ADDR(.text) - 0x1000 :
-	{
-		KEEP(*(.bootpg))
-	} :text = 0xffff
-#else
+/* For nor and nand is needed the SPL with section .resetvec */
+#ifndef CONFIG_SYS_MPC85XX_NO_RESETVEC
 #if defined(CONFIG_FSL_IFC) /* Restrict bootpg at 4K boundry for IFC */
 #ifndef BOOT_PAGE_OFFSET
 #define BOOT_PAGE_OFFSET 0x1000
 #endif
-	.bootpg ADDR(.text) + BOOT_PAGE_OFFSET :
+	.bootpg IMAGE_TEXT_BASE + BOOT_PAGE_OFFSET :
 	{
 		arch/powerpc/cpu/mpc85xx/start.o (.bootpg)
 	}
@@ -90,7 +92,7 @@ SECTIONS
 #else
 #error unknown NAND controller
 #endif
-	.resetvec ADDR(.text) + RESET_VECTOR_OFFSET : {
+	.resetvec IMAGE_TEXT_BASE + RESET_VECTOR_OFFSET : {
 		KEEP(*(.resetvec))
 	} = 0xffff
 #endif
diff --git a/arch/powerpc/cpu/mpc85xx/u-boot.lds b/arch/powerpc/cpu/mpc85xx/u-boot.lds
index 9d0f0d5..e1bbee4 100644
--- a/arch/powerpc/cpu/mpc85xx/u-boot.lds
+++ b/arch/powerpc/cpu/mpc85xx/u-boot.lds
@@ -23,6 +23,13 @@ PHDRS
 SECTIONS
 {
   /* Read-only sections, merged into text segment: */
+#ifdef CONFIG_SYS_MPC85XX_NO_RESETVEC
+  .bootpg CONFIG_SYS_TEXT_BASE - 0x1000 :
+  {
+    KEEP(arch/powerpc/cpu/mpc85xx/start.o (.bootpg))
+  } :text = 0xffff
+  . = CONFIG_SYS_TEXT_BASE;
+#endif
   .text      :
   {
     *(.text*)
@@ -77,13 +84,7 @@ SECTIONS
   __init_end = .;
   _end = .;
 
-#ifdef CONFIG_SYS_MPC85XX_NO_RESETVEC
-  .bootpg ADDR(.text) - 0x1000 :
-  {
-    KEEP(arch/powerpc/cpu/mpc85xx/start.o (.bootpg))
-  } :text = 0xffff
-  . = _end;
-#else
+#ifndef CONFIG_SYS_MPC85XX_NO_RESETVEC
   .bootpg RESET_VECTOR_ADDRESS - 0xffc :
   {
     arch/powerpc/cpu/mpc85xx/start.o	(.bootpg)
-- 
2.7.4