From 11d3e21f2b7297ddcb213f6892134b5c8f2a520b Mon Sep 17 00:00:00 2001
From: Matt Arsenault <Matthew.Arsenault@amd.com>
Date: Fri, 15 Jul 2016 21:26:56 +0000
Subject: [PATCH] AMDGPU: Remove AMDGPU.ldexp

llvm-svn: 275618
---
 llvm/include/llvm/IR/IntrinsicsAMDGPU.td      |  7 -------
 llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp |  4 ----
 llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ldexp.ll | 21 ---------------------
 3 files changed, 32 deletions(-)

diff --git a/llvm/include/llvm/IR/IntrinsicsAMDGPU.td b/llvm/include/llvm/IR/IntrinsicsAMDGPU.td
index 7ef9a84..d19b648 100644
--- a/llvm/include/llvm/IR/IntrinsicsAMDGPU.td
+++ b/llvm/include/llvm/IR/IntrinsicsAMDGPU.td
@@ -66,13 +66,6 @@ def int_r600_recipsqrt_clamped : Intrinsic<
 
 } // End TargetPrefix = "r600"
 
-// FIXME: These should be renamed/moved to r600
-let TargetPrefix = "AMDGPU" in {
-def int_AMDGPU_ldexp : Intrinsic<
-  [llvm_anyfloat_ty], [LLVMMatchType<0>, llvm_i32_ty], [IntrNoMem]
->;
-}
-
 let TargetPrefix = "amdgcn" in {
 
 defm int_amdgcn_workitem_id : AMDGPUReadPreloadRegisterIntrinsic_xyz;
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp b/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
index 7e8d374..0188724 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
@@ -926,10 +926,6 @@ SDValue AMDGPUTargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op,
       return DAG.getNode(AMDGPUISD::CLAMP, DL, VT,
                          Op.getOperand(1), Op.getOperand(2), Op.getOperand(3));
 
-    case Intrinsic::AMDGPU_ldexp: // Legacy name
-      return DAG.getNode(AMDGPUISD::LDEXP, DL, VT, Op.getOperand(1),
-                                                   Op.getOperand(2));
-
     case AMDGPUIntrinsic::AMDGPU_bfe_i32:
       return DAG.getNode(AMDGPUISD::BFE_I32, DL, VT,
                          Op.getOperand(1),
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ldexp.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ldexp.ll
index 511418f..a23defd 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ldexp.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ldexp.ll
@@ -4,9 +4,6 @@
 declare float @llvm.amdgcn.ldexp.f32(float, i32) nounwind readnone
 declare double @llvm.amdgcn.ldexp.f64(double, i32) nounwind readnone
 
-declare float @llvm.AMDGPU.ldexp.f32(float, i32) nounwind readnone
-declare double @llvm.AMDGPU.ldexp.f64(double, i32) nounwind readnone
-
 ; SI-LABEL: {{^}}test_ldexp_f32:
 ; SI: v_ldexp_f32
 ; SI: s_endpgm
@@ -25,24 +22,6 @@ define void @test_ldexp_f64(double addrspace(1)* %out, double %a, i32 %b) nounwi
   ret void
 }
 
-; SI-LABEL: {{^}}test_legacy_ldexp_f32:
-; SI: v_ldexp_f32
-; SI: s_endpgm
-define void @test_legacy_ldexp_f32(float addrspace(1)* %out, float %a, i32 %b) nounwind {
-  %result = call float @llvm.AMDGPU.ldexp.f32(float %a, i32 %b) nounwind readnone
-  store float %result, float addrspace(1)* %out, align 4
-  ret void
-}
-
-; SI-LABEL: {{^}}test_legacy_ldexp_f64:
-; SI: v_ldexp_f64
-; SI: s_endpgm
-define void @test_legacy_ldexp_f64(double addrspace(1)* %out, double %a, i32 %b) nounwind {
-  %result = call double @llvm.AMDGPU.ldexp.f64(double %a, i32 %b) nounwind readnone
-  store double %result, double addrspace(1)* %out, align 8
-  ret void
-}
-
 ; SI-LABEL: {{^}}test_ldexp_undef_f32:
 ; SI-NOT: v_ldexp_f32
 define void @test_ldexp_undef_f32(float addrspace(1)* %out, i32 %b) nounwind {
-- 
2.7.4