From 11a5909b26942683d5ec7e6810054a36d5a6ee67 Mon Sep 17 00:00:00 2001 From: Dean Luick Date: Tue, 1 Dec 2015 15:38:18 -0500 Subject: [PATCH] staging/rdma/hfi1: Correctly limit VLs against SDMA engines Correctly reduce the number of VLs when limited by the number of SDMA engines. The hardware has multiple egress mechanisms, SDMA and pio, and multiples of those. These mechanisms are chosen using the VL (8) The fix corrects a panic issue with one of the platforms that doesn't have enough SDMA (4) mechanisms for the typical number of VLs. Reviewed-by: Mike Marciniszyn Signed-off-by: Dean Luick Signed-off-by: Jubin John Signed-off-by: Greg Kroah-Hartman --- drivers/staging/rdma/hfi1/chip.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/staging/rdma/hfi1/chip.c b/drivers/staging/rdma/hfi1/chip.c index 03a665f..0c27cc0 100644 --- a/drivers/staging/rdma/hfi1/chip.c +++ b/drivers/staging/rdma/hfi1/chip.c @@ -10645,9 +10645,9 @@ struct hfi1_devdata *hfi1_init_dd(struct pci_dev *pdev, /* insure num_vls isn't larger than number of sdma engines */ if (HFI1_CAP_IS_KSET(SDMA) && num_vls > dd->chip_sdma_engines) { dd_dev_err(dd, "num_vls %u too large, using %u VLs\n", - num_vls, HFI1_MAX_VLS_SUPPORTED); - ppd->vls_supported = num_vls = HFI1_MAX_VLS_SUPPORTED; - ppd->vls_operational = ppd->vls_supported; + num_vls, dd->chip_sdma_engines); + num_vls = dd->chip_sdma_engines; + ppd->vls_supported = dd->chip_sdma_engines; } /* -- 2.7.4