From 11322203b7ba60a85408286fcf9971d1b6cf06a1 Mon Sep 17 00:00:00 2001 From: Craig Topper Date: Wed, 3 Aug 2022 14:28:24 -0700 Subject: [PATCH] [X86] Add a test for missed opportunity combine AND32rm+TEST32rr. If the chain output of the AND32rm is used, the post isel peephole won't fold it. We should be able to fold it by replacing the chain use with the chain from a TEST32rm. --- llvm/test/CodeGen/X86/cmp.ll | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/llvm/test/CodeGen/X86/cmp.ll b/llvm/test/CodeGen/X86/cmp.ll index 1d0ef73..c918e88 100644 --- a/llvm/test/CodeGen/X86/cmp.ll +++ b/llvm/test/CodeGen/X86/cmp.ll @@ -758,3 +758,21 @@ return: ; preds = %if.end, %if.then declare i32 @g() declare i32 @f() + +; FIXME: We should use a test from memory here instead of a load+and.i +; The store makes sure the chain result of the load is used which prevents the +; post isel peephole from catching this. +define i1 @fold_test_and_with_chain(i32* %x, i32* %y, i32 %z) { +; CHECK-LABEL: fold_test_and_with_chain: +; CHECK: # %bb.0: +; CHECK-NEXT: movl (%rdi), %eax # encoding: [0x8b,0x07] +; CHECK-NEXT: andl %edx, %eax # encoding: [0x21,0xd0] +; CHECK-NEXT: sete %al # encoding: [0x0f,0x94,0xc0] +; CHECK-NEXT: movl %edx, (%rsi) # encoding: [0x89,0x16] +; CHECK-NEXT: retq # encoding: [0xc3] + %a = load i32, i32* %x + %b = and i32 %z, %a + %c = icmp eq i32 %b, 0 + store i32 %z, i32* %y + ret i1 %c +} -- 2.7.4