From 1104e3258b5064e7110cc297e2cec60ac9acfc0a Mon Sep 17 00:00:00 2001 From: Alexander Pivovarov Date: Thu, 2 Sep 2021 18:07:03 -0700 Subject: [PATCH] Fix typo in RISCVMatInt.cpp comments --- llvm/lib/Target/RISCV/MCTargetDesc/RISCVMatInt.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMatInt.cpp b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMatInt.cpp index 2ca5eeb..af0434e 100644 --- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMatInt.cpp +++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMatInt.cpp @@ -77,7 +77,7 @@ static void generateInstSeqImpl(int64_t Val, assert(IsRV64 && "Can't emit >32-bit imm for non-RV64 target"); // In the worst case, for a full 64-bit constant, a sequence of 8 instructions - // (i.e., LUI+ADDIW+SLLI+ADDI+SLLI+ADDI+SLLI+ADDI) has to be emmitted. Note + // (i.e., LUI+ADDIW+SLLI+ADDI+SLLI+ADDI+SLLI+ADDI) has to be emitted. Note // that the first two instructions (LUI+ADDIW) can contribute up to 32 bits // while the following ADDI instructions contribute up to 12 bits each. // -- 2.7.4