From 10bbf137cf8103f09ce049a71f8e98dc92f821ab Mon Sep 17 00:00:00 2001 From: Ulrich Weigand Date: Wed, 30 Jul 2003 23:21:24 +0000 Subject: [PATCH] s390.md (UNSPEC_ROUND, [...]): New constants. * config/s390/s390.md (UNSPEC_ROUND, UNSPEC_SETHIGH, UNSPECV_BLOCKAGE): New constants. ("*sethighqisi", "*sethighhisi", "*sethiqidi_64", "*sethiqidi_31", "*extractqi", "*extracthi", "*extendqidi2" splitter, "*extendqisi2" splitter, "fix_truncdfdi2_ieee", "fix_truncdfsi2_ieee", "fix_truncsfdi2", "fix_truncsfsi2", "blockage"): Use them. (all insns and expanders): Write output control string as brace block where appropriate. Remove \-escapes for doublequote characters. From-SVN: r69978 --- gcc/ChangeLog | 12 + gcc/config/s390/s390.md | 576 ++++++++++++++++++++---------------------------- 2 files changed, 255 insertions(+), 333 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 44eb8c0..358f141 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,15 @@ +2003-07-31 Ulrich Weigand + + * config/s390/s390.md (UNSPEC_ROUND, UNSPEC_SETHIGH, + UNSPECV_BLOCKAGE): New constants. + ("*sethighqisi", "*sethighhisi", "*sethiqidi_64", "*sethiqidi_31", + "*extractqi", "*extracthi", "*extendqidi2" splitter, "*extendqisi2" + splitter, "fix_truncdfdi2_ieee", "fix_truncdfsi2_ieee", + "fix_truncsfdi2", "fix_truncsfsi2", "blockage"): Use them. + + (all insns and expanders): Write output control string as brace block + where appropriate. Remove \-escapes for doublequote characters. + Thu Jul 31 01:04:19 CEST 2003 Jan Hubicka * gcse.c (insert_store): Fix typo in previous patch. diff --git a/gcc/config/s390/s390.md b/gcc/config/s390/s390.md index a82476f..e1a25cc 100644 --- a/gcc/config/s390/s390.md +++ b/gcc/config/s390/s390.md @@ -50,7 +50,11 @@ ;; (define_constants - [; GOT/PLT and lt-relative accesses + [; Miscellaneous + (UNSPEC_ROUND 1) + (UNSPEC_SETHIGH 10) + + ; GOT/PLT and lt-relative accesses (UNSPEC_LTREL_OFFSET 100) (UNSPEC_LTREL_BASE 101) (UNSPEC_GOTENT 110) @@ -81,7 +85,10 @@ ;; (define_constants - [; Literal pool + [; Blockage + (UNSPECV_BLOCKAGE 0) + + ; Literal pool (UNSPECV_POOL 200) (UNSPECV_POOL_START 201) (UNSPECV_POOL_END 202) @@ -304,48 +311,44 @@ (compare:CC (match_operand:DI 0 "register_operand" "") (match_operand:DI 1 "general_operand" "")))] "TARGET_64BIT" - " { s390_compare_op0 = operands[0]; s390_compare_op1 = operands[1]; DONE; -}") +}) (define_expand "cmpsi" [(set (reg:CC 33) (compare:CC (match_operand:SI 0 "register_operand" "") (match_operand:SI 1 "general_operand" "")))] "" - " { s390_compare_op0 = operands[0]; s390_compare_op1 = operands[1]; DONE; -}") +}) (define_expand "cmpdf" [(set (reg:CC 33) (compare:CC (match_operand:DF 0 "register_operand" "") (match_operand:DF 1 "general_operand" "")))] "TARGET_HARD_FLOAT" - " { s390_compare_op0 = operands[0]; s390_compare_op1 = operands[1]; DONE; -}") +}) (define_expand "cmpsf" [(set (reg:CC 33) (compare:CC (match_operand:SF 0 "register_operand" "") (match_operand:SF 1 "general_operand" "")))] "TARGET_HARD_FLOAT" - " { s390_compare_op0 = operands[0]; s390_compare_op1 = operands[1]; DONE; -}") +}) ; Test-under-Mask (zero_extract) instructions @@ -361,7 +364,6 @@ && INTVAL (operands[1]) + INTVAL (operands[2]) <= 64 && (INTVAL (operands[1]) + INTVAL (operands[2]) - 1) >> 4 == INTVAL (operands[2]) >> 4" - "* { int part = INTVAL (operands[2]) >> 4; int block = (1 << INTVAL (operands[1])) - 1; @@ -371,13 +373,13 @@ switch (part) { - case 0: return \"tmhh\\t%0,%x2\"; - case 1: return \"tmhl\\t%0,%x2\"; - case 2: return \"tmlh\\t%0,%x2\"; - case 3: return \"tmll\\t%0,%x2\"; + case 0: return "tmhh\\t%0,%x2"; + case 1: return "tmhl\\t%0,%x2"; + case 2: return "tmlh\\t%0,%x2"; + case 3: return "tmll\\t%0,%x2"; default: abort (); } -}" +} [(set_attr "op_type" "RI")]) (define_insn "*tmsi_ext" @@ -391,7 +393,6 @@ && INTVAL (operands[1]) + INTVAL (operands[2]) <= 32 && (INTVAL (operands[1]) + INTVAL (operands[2]) - 1) >> 4 == INTVAL (operands[2]) >> 4" - "* { int part = INTVAL (operands[2]) >> 4; int block = (1 << INTVAL (operands[1])) - 1; @@ -401,11 +402,11 @@ switch (part) { - case 0: return \"tmh\\t%0,%x2\"; - case 1: return \"tml\\t%0,%x2\"; + case 0: return "tmh\\t%0,%x2"; + case 1: return "tml\\t%0,%x2"; default: abort (); } -}" +} [(set_attr "op_type" "RI")]) (define_insn "*tmqi_ext" @@ -417,14 +418,13 @@ "s390_match_ccmode(insn, CCTmode) && INTVAL (operands[1]) >= 1 && INTVAL (operands[2]) >= 0 && INTVAL (operands[1]) + INTVAL (operands[2]) <= 8" - "* { int block = (1 << INTVAL (operands[1])) - 1; int shift = 8 - INTVAL (operands[1]) - INTVAL (operands[2]); operands[2] = GEN_INT (block << shift); - return which_alternative == 0 ? \"tm\\t%0,%b2\" : \"tmy\\t%0,%b2\"; -}" + return which_alternative == 0 ? "tm\\t%0,%b2" : "tmy\\t%0,%b2"; +} [(set_attr "op_type" "SI,SIY")]) ; Test-under-Mask instructions @@ -437,15 +437,14 @@ "TARGET_64BIT && s390_match_ccmode (insn, s390_tm_ccmode (operands[1], operands[2], 0)) && s390_single_qi (operands[1], DImode, 0) >= 0" - "* { int part = s390_single_qi (operands[1], DImode, 0); operands[1] = GEN_INT (s390_extract_qi (operands[1], DImode, part)); operands[0] = gen_rtx_MEM (QImode, plus_constant (XEXP (operands[0], 0), part)); - return which_alternative == 0 ? \"tm\\t%0,%b1\" : \"tmy\\t%0,%b1\"; -}" + return which_alternative == 0 ? "tm\\t%0,%b1" : "tmy\\t%0,%b1"; +} [(set_attr "op_type" "SI,SIY")]) (define_insn "*tmsi_mem" @@ -455,15 +454,14 @@ (match_operand:SI 2 "immediate_operand" "n,n")))] "s390_match_ccmode (insn, s390_tm_ccmode (operands[1], operands[2], 0)) && s390_single_qi (operands[1], SImode, 0) >= 0" - "* { int part = s390_single_qi (operands[1], SImode, 0); operands[1] = GEN_INT (s390_extract_qi (operands[1], SImode, part)); operands[0] = gen_rtx_MEM (QImode, plus_constant (XEXP (operands[0], 0), part)); - return which_alternative == 0 ? \"tm\\t%0,%b1\" : \"tmy\\t%0,%b1\"; -}" + return which_alternative == 0 ? "tm\\t%0,%b1" : "tmy\\t%0,%b1"; +} [(set_attr "op_type" "SI")]) (define_insn "*tmhi_mem" @@ -473,15 +471,14 @@ (match_operand:SI 2 "immediate_operand" "n,n")))] "s390_match_ccmode (insn, s390_tm_ccmode (operands[1], operands[2], 0)) && s390_single_qi (operands[1], HImode, 0) >= 0" - "* { int part = s390_single_qi (operands[1], HImode, 0); operands[1] = GEN_INT (s390_extract_qi (operands[1], HImode, part)); operands[0] = gen_rtx_MEM (QImode, plus_constant (XEXP (operands[0], 0), part)); - return which_alternative == 0 ? \"tm\\t%0,%b1\" : \"tmy\\t%0,%b1\"; -}" + return which_alternative == 0 ? "tm\\t%0,%b1" : "tmy\\t%0,%b1"; +} [(set_attr "op_type" "SI")]) (define_insn "*tmqi_mem" @@ -503,20 +500,19 @@ "TARGET_64BIT && s390_match_ccmode (insn, s390_tm_ccmode (operands[1], operands[2], 1)) && s390_single_hi (operands[1], DImode, 0) >= 0" - "* { int part = s390_single_hi (operands[1], DImode, 0); operands[1] = GEN_INT (s390_extract_hi (operands[1], DImode, part)); switch (part) { - case 0: return \"tmhh\\t%0,%x1\"; - case 1: return \"tmhl\\t%0,%x1\"; - case 2: return \"tmlh\\t%0,%x1\"; - case 3: return \"tmll\\t%0,%x1\"; + case 0: return "tmhh\\t%0,%x1"; + case 1: return "tmhl\\t%0,%x1"; + case 2: return "tmlh\\t%0,%x1"; + case 3: return "tmll\\t%0,%x1"; default: abort (); } -}" +} [(set_attr "op_type" "RI")]) (define_insn "*tmsi_reg" @@ -526,18 +522,17 @@ (match_operand:SI 2 "immediate_operand" "n")))] "s390_match_ccmode (insn, s390_tm_ccmode (operands[1], operands[2], 1)) && s390_single_hi (operands[1], SImode, 0) >= 0" - "* { int part = s390_single_hi (operands[1], SImode, 0); operands[1] = GEN_INT (s390_extract_hi (operands[1], SImode, part)); switch (part) { - case 0: return \"tmh\\t%0,%x1\"; - case 1: return \"tml\\t%0,%x1\"; + case 0: return "tmh\\t%0,%x1"; + case 1: return "tml\\t%0,%x1"; default: abort (); } -}" +} [(set_attr "op_type" "RI")]) (define_insn "*tmhi_full" @@ -1036,7 +1031,6 @@ [(set (match_operand:DI 0 "general_operand" "") (match_operand:DI 1 "general_operand" ""))] "" - " { /* Handle symbolic constants. */ if (TARGET_64BIT && SYMBOLIC_CONST (operands[1])) @@ -1049,7 +1043,7 @@ && (!legitimate_reload_constant_p (operands[1]) || FP_REG_P (operands[0]))) operands[1] = force_const_mem (DImode, operands[1]); -}") +}) (define_insn "*movdi_lhi" [(set (match_operand:DI 0 "register_operand" "=d") @@ -1066,20 +1060,19 @@ (match_operand:DI 1 "immediate_operand" "n"))] "TARGET_64BIT && s390_single_hi (operands[1], DImode, 0) >= 0 && !FP_REG_P (operands[0])" - "* { int part = s390_single_hi (operands[1], DImode, 0); operands[1] = GEN_INT (s390_extract_hi (operands[1], DImode, part)); switch (part) { - case 0: return \"llihh\\t%0,%x1\"; - case 1: return \"llihl\\t%0,%x1\"; - case 2: return \"llilh\\t%0,%x1\"; - case 3: return \"llill\\t%0,%x1\"; + case 0: return "llihh\\t%0,%x1"; + case 1: return "llihl\\t%0,%x1"; + case 2: return "llilh\\t%0,%x1"; + case 3: return "llill\\t%0,%x1"; default: abort (); } -}" +} [(set_attr "op_type" "RI")]) (define_insn "*movdi_lay" @@ -1210,7 +1203,6 @@ [(set (match_operand:SI 0 "general_operand" "") (match_operand:SI 1 "general_operand" ""))] "" - " { /* Handle symbolic constants. */ if (!TARGET_64BIT && SYMBOLIC_CONST (operands[1])) @@ -1236,7 +1228,7 @@ && (!legitimate_reload_constant_p (operands[1]) || FP_REG_P (operands[0]))) operands[1] = force_const_mem (SImode, operands[1]); -}") +}) (define_insn "*movsi_lhi" [(set (match_operand:SI 0 "register_operand" "=d") @@ -1252,18 +1244,17 @@ (match_operand:SI 1 "immediate_operand" "n"))] "TARGET_64BIT && s390_single_hi (operands[1], SImode, 0) >= 0 && !FP_REG_P (operands[0])" - "* { int part = s390_single_hi (operands[1], SImode, 0); operands[1] = GEN_INT (s390_extract_hi (operands[1], SImode, part)); switch (part) { - case 0: return \"llilh\\t%0,%x1\"; - case 1: return \"llill\\t%0,%x1\"; + case 0: return "llilh\\t%0,%x1"; + case 1: return "llill\\t%0,%x1"; default: abort (); } -}" +} [(set_attr "op_type" "RI")]) (define_insn "*movsi_lay" @@ -1432,14 +1423,13 @@ [(set (match_operand:DF 0 "nonimmediate_operand" "") (match_operand:DF 1 "general_operand" ""))] "" - " { /* During and after reload, we need to force constants to the literal pool ourselves, if necessary. */ if ((reload_in_progress || reload_completed) && CONSTANT_P (operands[1])) operands[1] = force_const_mem (DFmode, operands[1]); -}") +}) (define_insn "*movdf_64" [(set (match_operand:DF 0 "nonimmediate_operand" "=f,f,f,R,T,d,d,m,?Q") @@ -1537,14 +1527,13 @@ [(set (match_operand:SF 0 "nonimmediate_operand" "") (match_operand:SF 1 "general_operand" ""))] "" - " { /* During and after reload, we need to force constants to the literal pool ourselves, if necessary. */ if ((reload_in_progress || reload_completed) && CONSTANT_P (operands[1])) operands[1] = force_const_mem (SFmode, operands[1]); -}") +}) (define_insn "*movsf" [(set (match_operand:SF 0 "nonimmediate_operand" "=f,f,f,R,T,d,d,d,R,T,?Q") @@ -1574,7 +1563,6 @@ (match_operand 1 "" "")) (use (match_operand 2 "" ""))])] "" - " { int regno; int count; @@ -1627,19 +1615,18 @@ change_address (operands[1], Pmode, plus_constant (from, off + i * UNITS_PER_WORD))); -}") +}) (define_insn "*load_multiple_di" [(match_parallel 0 "load_multiple_operation" [(set (match_operand:DI 1 "register_operand" "=r") (match_operand:DI 2 "s_operand" "QS"))])] "" - "* { int words = XVECLEN (operands[0], 0); operands[0] = gen_rtx_REG (DImode, REGNO (operands[1]) + words - 1); - return \"lmg\\t%1,%0,%2\"; -}" + return "lmg\\t%1,%0,%2"; +} [(set_attr "op_type" "RSY") (set_attr "type" "lm")]) @@ -1648,12 +1635,11 @@ [(set (match_operand:SI 1 "register_operand" "=r,r") (match_operand:SI 2 "s_operand" "Q,S"))])] "" - "* { int words = XVECLEN (operands[0], 0); operands[0] = gen_rtx_REG (SImode, REGNO (operands[1]) + words - 1); - return which_alternative == 0 ? \"lm\\t%1,%0,%2\" : \"lmy\\t%1,%0,%2\"; -}" + return which_alternative == 0 ? "lm\\t%1,%0,%2" : "lmy\\t%1,%0,%2"; +} [(set_attr "op_type" "RS,RSY") (set_attr "type" "lm")]) @@ -1666,7 +1652,6 @@ (match_operand 1 "" "")) (use (match_operand 2 "" ""))])] "" - " { int regno; int count; @@ -1721,19 +1706,18 @@ plus_constant (to, off + i * UNITS_PER_WORD)), gen_rtx_REG (Pmode, regno + i)); -}") +}) (define_insn "*store_multiple_di" [(match_parallel 0 "store_multiple_operation" [(set (match_operand:DI 1 "s_operand" "=QS") (match_operand:DI 2 "register_operand" "r"))])] "" - "* { int words = XVECLEN (operands[0], 0); operands[0] = gen_rtx_REG (DImode, REGNO (operands[2]) + words - 1); - return \"stmg\\t%2,%0,%1\"; -}" + return "stmg\\t%2,%0,%1"; +} [(set_attr "op_type" "RSY") (set_attr "type" "stm")]) @@ -1743,12 +1727,11 @@ [(set (match_operand:SI 1 "s_operand" "=Q,S") (match_operand:SI 2 "register_operand" "r,r"))])] "" - "* { int words = XVECLEN (operands[0], 0); operands[0] = gen_rtx_REG (SImode, REGNO (operands[2]) + words - 1); - return which_alternative == 0 ? \"stm\\t%2,%0,%1\" : \"stmy\\t%2,%0,%1\"; -}" + return which_alternative == 0 ? "stm\\t%2,%0,%1" : "stmy\\t%2,%0,%1"; +} [(set_attr "op_type" "RS,RSY") (set_attr "type" "stm")]) @@ -1785,22 +1768,21 @@ (use (match_operand:DI 2 "nonmemory_operand" "n,a")) (clobber (match_scratch:DI 3 "=X,&a"))] "TARGET_64BIT" - "* { switch (which_alternative) { case 0: - return \"mvc\\t%O0(%b2+1,%R0),%1\"; + return "mvc\\t%O0(%b2+1,%R0),%1"; case 1: - output_asm_insn (\"bras\\t%3,.+10\", operands); - output_asm_insn (\"mvc\\t%O0(1,%R0),%1\", operands); - return \"ex\\t%2,0(%3)\"; + output_asm_insn ("bras\\t%3,.+10", operands); + output_asm_insn ("mvc\\t%O0(1,%R0),%1", operands); + return "ex\\t%2,0(%3)"; default: abort (); } -}" +} [(set_attr "op_type" "SS,NN") (set_attr "type" "cs,cs") (set_attr "atype" "*,agen") @@ -1812,22 +1794,21 @@ (use (match_operand:SI 2 "nonmemory_operand" "n,a")) (clobber (match_scratch:SI 3 "=X,&a"))] "!TARGET_64BIT" - "* { switch (which_alternative) { case 0: - return \"mvc\\t%O0(%b2+1,%R0),%1\"; + return "mvc\\t%O0(%b2+1,%R0),%1"; case 1: - output_asm_insn (\"bras\\t%3,.+10\", operands); - output_asm_insn (\"mvc\\t%O0(1,%R0),%1\", operands); - return \"ex\\t%2,0(%3)\"; + output_asm_insn ("bras\\t%3,.+10", operands); + output_asm_insn ("mvc\\t%O0(1,%R0),%1", operands); + return "ex\\t%2,0(%3)"; default: abort (); } -}" +} [(set_attr "op_type" "SS,NN") (set_attr "type" "cs,cs") (set_attr "atype" "*,agen") @@ -1901,22 +1882,21 @@ (clobber (match_scratch:DI 2 "=X,&a")) (clobber (reg:CC 33))] "TARGET_64BIT" - "* { switch (which_alternative) { case 0: - return \"xc\\t%O0(%b1+1,%R0),%0\"; + return "xc\\t%O0(%b1+1,%R0),%0"; case 1: - output_asm_insn (\"bras\\t%2,.+10\", operands); - output_asm_insn (\"xc\\t%O0(1,%R0),%0\", operands); - return \"ex\\t%1,0(%2)\"; + output_asm_insn ("bras\\t%2,.+10", operands); + output_asm_insn ("xc\\t%O0(1,%R0),%0", operands); + return "ex\\t%1,0(%2)"; default: abort (); } -}" +} [(set_attr "op_type" "SS,NN") (set_attr "type" "cs,cs") (set_attr "atype" "*,agen") @@ -1929,22 +1909,21 @@ (clobber (match_scratch:SI 2 "=X,&a")) (clobber (reg:CC 33))] "!TARGET_64BIT" - "* { switch (which_alternative) { case 0: - return \"xc\\t%O0(%b1+1,%R0),%0\"; + return "xc\\t%O0(%b1+1,%R0),%0"; case 1: - output_asm_insn (\"bras\\t%2,.+10\", operands); - output_asm_insn (\"xc\\t%O0(1,%R0),%0\", operands); - return \"ex\\t%1,0(%2)\"; + output_asm_insn ("bras\\t%2,.+10", operands); + output_asm_insn ("xc\\t%O0(1,%R0),%0", operands); + return "ex\\t%1,0(%2)"; default: abort (); } -}" +} [(set_attr "op_type" "SS,NN") (set_attr "type" "cs,cs") (set_attr "atype" "*,agen") @@ -2016,22 +1995,21 @@ (use (match_operand:DI 2 "nonmemory_operand" "n,a")) (clobber (match_scratch:DI 3 "=X,&a"))] "TARGET_64BIT" - "* { switch (which_alternative) { case 0: - return \"clc\\t%O0(%b2+1,%R0),%1\"; + return "clc\\t%O0(%b2+1,%R0),%1"; case 1: - output_asm_insn (\"bras\\t%3,.+10\", operands); - output_asm_insn (\"clc\\t%O0(1,%R0),%1\", operands); - return \"ex\\t%2,0(%3)\"; + output_asm_insn ("bras\\t%3,.+10", operands); + output_asm_insn ("clc\\t%O0(1,%R0),%1", operands); + return "ex\\t%2,0(%3)"; default: abort (); } -}" +} [(set_attr "op_type" "SS,NN") (set_attr "type" "cs,cs") (set_attr "atype" "*,agen") @@ -2044,22 +2022,21 @@ (use (match_operand:SI 2 "nonmemory_operand" "n,a")) (clobber (match_scratch:SI 3 "=X,&a"))] "!TARGET_64BIT" - "* { switch (which_alternative) { case 0: - return \"clc\\t%O0(%b2+1,%R0),%1\"; + return "clc\\t%O0(%b2+1,%R0),%1"; case 1: - output_asm_insn (\"bras\\t%3,.+10\", operands); - output_asm_insn (\"clc\\t%O0(1,%R0),%1\", operands); - return \"ex\\t%2,0(%3)\"; + output_asm_insn ("bras\\t%3,.+10", operands); + output_asm_insn ("clc\\t%O0(1,%R0),%1", operands); + return "ex\\t%2,0(%3)"; default: abort (); } -}" +} [(set_attr "op_type" "SS,NN") (set_attr "type" "cs,cs") (set_attr "atype" "*,agen") @@ -2099,14 +2076,13 @@ [(set (match_operand:SI 0 "register_operand" "=d") (compare:SI (reg:CCS 33) (const_int 0)))] "" - "* { - output_asm_insn (\"lhi\\t%0,1\", operands); - output_asm_insn (\"jh\\t.+12\", operands); - output_asm_insn (\"jl\\t.+6\", operands); - output_asm_insn (\"sr\\t%0,%0\", operands); - return \"lcr\\t%0,%0\"; -}" + output_asm_insn ("lhi\\t%0,1", operands); + output_asm_insn ("jh\\t.+12", operands); + output_asm_insn ("jl\\t.+6", operands); + output_asm_insn ("sr\\t%0,%0", operands); + return "lcr\\t%0,%0"; +} [(set_attr "op_type" "NN") (set_attr "length" "16") (set_attr "type" "other")]) @@ -2115,14 +2091,13 @@ [(set (match_operand:DI 0 "register_operand" "=d") (compare:DI (reg:CCS 33) (const_int 0)))] "TARGET_64BIT" - "* { - output_asm_insn (\"lghi\\t%0,1\", operands); - output_asm_insn (\"jh\\t.+12\", operands); - output_asm_insn (\"jl\\t.+6\", operands); - output_asm_insn (\"sgr\\t%0,%0\", operands); - return \"lcgr\\t%0,%0\"; -}" + output_asm_insn ("lghi\\t%0,1", operands); + output_asm_insn ("jh\\t.+12", operands); + output_asm_insn ("jl\\t.+6", operands); + output_asm_insn ("sgr\\t%0,%0", operands); + return "lcgr\\t%0,%0"; +} [(set_attr "op_type" "NN") (set_attr "length" "22") (set_attr "type" "other")]) @@ -2134,7 +2109,7 @@ (define_insn "*sethighqisi" [(set (match_operand:SI 0 "register_operand" "=d,d") - (unspec:SI [(match_operand:QI 1 "s_operand" "Q,S")] 10)) + (unspec:SI [(match_operand:QI 1 "s_operand" "Q,S")] UNSPEC_SETHIGH)) (clobber (reg:CC 33))] "" "@ @@ -2144,7 +2119,7 @@ (define_insn "*sethighhisi" [(set (match_operand:SI 0 "register_operand" "=d,d") - (unspec:SI [(match_operand:HI 1 "s_operand" "Q,S")] 10)) + (unspec:SI [(match_operand:HI 1 "s_operand" "Q,S")] UNSPEC_SETHIGH)) (clobber (reg:CC 33))] "" "@ @@ -2154,7 +2129,7 @@ (define_insn "*sethighqidi_64" [(set (match_operand:DI 0 "register_operand" "=d") - (unspec:DI [(match_operand:QI 1 "s_operand" "QS")] 10)) + (unspec:DI [(match_operand:QI 1 "s_operand" "QS")] UNSPEC_SETHIGH)) (clobber (reg:CC 33))] "TARGET_64BIT" "icmh\\t%0,8,%1" @@ -2162,7 +2137,7 @@ (define_insn "*sethighqidi_31" [(set (match_operand:DI 0 "register_operand" "=d,d") - (unspec:DI [(match_operand:QI 1 "s_operand" "Q,S")] 10)) + (unspec:DI [(match_operand:QI 1 "s_operand" "Q,S")] UNSPEC_SETHIGH)) (clobber (reg:CC 33))] "!TARGET_64BIT" "@ @@ -2181,14 +2156,13 @@ "#" "&& reload_completed" [(parallel - [(set (match_dup 0) (unspec:SI [(match_dup 1)] 10)) + [(set (match_dup 0) (unspec:SI [(match_dup 1)] UNSPEC_SETHIGH)) (clobber (reg:CC 33))]) (set (match_dup 0) (lshiftrt:SI (match_dup 0) (match_dup 2)))] - " { operands[2] = GEN_INT (32 - INTVAL (operands[2])); operands[1] = change_address (operands[1], QImode, 0); -}" +} [(set_attr "atype" "agen")]) (define_insn_and_split "*extracthi" @@ -2202,14 +2176,13 @@ "#" "&& reload_completed" [(parallel - [(set (match_dup 0) (unspec:SI [(match_dup 1)] 10)) + [(set (match_dup 0) (unspec:SI [(match_dup 1)] UNSPEC_SETHIGH)) (clobber (reg:CC 33))]) (set (match_dup 0) (lshiftrt:SI (match_dup 0) (match_dup 2)))] - " { operands[2] = GEN_INT (32 - INTVAL (operands[2])); operands[1] = change_address (operands[1], HImode, 0); -}" +} [(set_attr "atype" "agen")]) ; @@ -2315,7 +2288,7 @@ (sign_extend:DI (match_operand:QI 1 "s_operand" "")))] "TARGET_64BIT && !TARGET_LONG_DISPLACEMENT && !reload_completed" [(parallel - [(set (match_dup 0) (unspec:DI [(match_dup 1)] 10)) + [(set (match_dup 0) (unspec:DI [(match_dup 1)] UNSPEC_SETHIGH)) (clobber (reg:CC 33))]) (parallel [(set (match_dup 0) (ashiftrt:DI (match_dup 0) (const_int 56))) @@ -2377,7 +2350,7 @@ (sign_extend:SI (match_operand:QI 1 "s_operand" "")))] "(!TARGET_64BIT || !TARGET_LONG_DISPLACEMENT) && !reload_completed" [(parallel - [(set (match_dup 0) (unspec:SI [(match_dup 1)] 10)) + [(set (match_dup 0) (unspec:SI [(match_dup 1)] UNSPEC_SETHIGH)) (clobber (reg:CC 33))]) (parallel [(set (match_dup 0) (ashiftrt:SI (match_dup 0) (const_int 24))) @@ -2600,7 +2573,6 @@ [(set (match_operand:DI 0 "register_operand" "") (unsigned_fix:DI (match_operand:DF 1 "register_operand" "")))] "TARGET_64BIT && TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT" - " { rtx label1 = gen_label_rtx (); rtx label2 = gen_label_rtx (); @@ -2609,11 +2581,11 @@ emit_insn (gen_cmpdf (operands[1], CONST_DOUBLE_FROM_REAL_VALUE ( - REAL_VALUE_ATOF (\"9223372036854775808.0\", DFmode), DFmode))); + REAL_VALUE_ATOF ("9223372036854775808.0", DFmode), DFmode))); emit_jump_insn (gen_blt (label1)); emit_insn (gen_subdf3 (temp, operands[1], CONST_DOUBLE_FROM_REAL_VALUE ( - REAL_VALUE_ATOF (\"18446744073709551616.0\", DFmode), DFmode))); + REAL_VALUE_ATOF ("18446744073709551616.0", DFmode), DFmode))); emit_insn (gen_fix_truncdfdi2_ieee (operands[0], temp, GEN_INT(7))); emit_jump (label2); @@ -2621,23 +2593,22 @@ emit_insn (gen_fix_truncdfdi2_ieee (operands[0], operands[1], GEN_INT(5))); emit_label (label2); DONE; -}") +}) (define_expand "fix_truncdfdi2" [(set (match_operand:DI 0 "register_operand" "") (fix:DI (match_operand:DF 1 "nonimmediate_operand" "")))] "TARGET_64BIT && TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT" - " { operands[1] = force_reg (DFmode, operands[1]); emit_insn (gen_fix_truncdfdi2_ieee (operands[0], operands[1], GEN_INT(5))); DONE; -}") +}) (define_insn "fix_truncdfdi2_ieee" [(set (match_operand:DI 0 "register_operand" "=d") (fix:DI (match_operand:DF 1 "register_operand" "f"))) - (unspec:DI [(match_operand:DI 2 "immediate_operand" "K")] 1) + (unspec:DI [(match_operand:DI 2 "immediate_operand" "K")] UNSPEC_ROUND) (clobber (reg:CC 33))] "TARGET_64BIT && TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT" "cgdbr\\t%0,%h2,%1" @@ -2652,7 +2623,6 @@ [(set (match_operand:SI 0 "register_operand" "") (unsigned_fix:SI (match_operand:DF 1 "register_operand" "")))] "TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT" - " { rtx label1 = gen_label_rtx (); rtx label2 = gen_label_rtx (); @@ -2661,11 +2631,11 @@ operands[1] = force_reg (DFmode,operands[1]); emit_insn (gen_cmpdf (operands[1], CONST_DOUBLE_FROM_REAL_VALUE ( - REAL_VALUE_ATOF (\"2147483648.0\", DFmode), DFmode))); + REAL_VALUE_ATOF ("2147483648.0", DFmode), DFmode))); emit_jump_insn (gen_blt (label1)); emit_insn (gen_subdf3 (temp, operands[1], CONST_DOUBLE_FROM_REAL_VALUE ( - REAL_VALUE_ATOF (\"4294967296.0\", DFmode), DFmode))); + REAL_VALUE_ATOF ("4294967296.0", DFmode), DFmode))); emit_insn (gen_fix_truncdfsi2_ieee (operands[0], temp, GEN_INT (7))); emit_jump (label2); @@ -2673,13 +2643,12 @@ emit_insn (gen_fix_truncdfsi2_ieee (operands[0], operands[1], GEN_INT (5))); emit_label (label2); DONE; -}") +}) (define_expand "fix_truncdfsi2" [(set (match_operand:SI 0 "register_operand" "") (fix:SI (match_operand:DF 1 "nonimmediate_operand" "")))] "TARGET_HARD_FLOAT" - " { if (TARGET_IBM_FLOAT) { @@ -2700,12 +2669,12 @@ } DONE; -}") +}) (define_insn "fix_truncdfsi2_ieee" [(set (match_operand:SI 0 "register_operand" "=d") (fix:SI (match_operand:DF 1 "register_operand" "f"))) - (unspec:SI [(match_operand:SI 2 "immediate_operand" "K")] 1) + (unspec:SI [(match_operand:SI 2 "immediate_operand" "K")] UNSPEC_ROUND) (clobber (reg:CC 33))] "TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT" "cfdbr\\t%0,%h2,%1" @@ -2720,14 +2689,13 @@ (use (match_operand:BLK 4 "memory_operand" "m")) (clobber (reg:CC 33))] "TARGET_HARD_FLOAT && TARGET_IBM_FLOAT" - "* { - output_asm_insn (\"sd\\t%1,%2\", operands); - output_asm_insn (\"aw\\t%1,%3\", operands); - output_asm_insn (\"std\\t%1,%4\", operands); - output_asm_insn (\"xi\\t%N4,128\", operands); - return \"l\\t%0,%N4\"; -}" + output_asm_insn ("sd\\t%1,%2", operands); + output_asm_insn ("aw\\t%1,%3", operands); + output_asm_insn ("std\\t%1,%4", operands); + output_asm_insn ("xi\\t%N4,128", operands); + return "l\\t%0,%N4"; +} [(set_attr "op_type" "NN") (set_attr "type" "ftoi") (set_attr "atype" "agen") @@ -2741,7 +2709,6 @@ [(set (match_operand:DI 0 "register_operand" "") (unsigned_fix:DI (match_operand:SF 1 "register_operand" "")))] "TARGET_64BIT && TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT" - " { rtx label1 = gen_label_rtx (); rtx label2 = gen_label_rtx (); @@ -2750,12 +2717,12 @@ operands[1] = force_reg (SFmode, operands[1]); emit_insn (gen_cmpsf (operands[1], CONST_DOUBLE_FROM_REAL_VALUE ( - REAL_VALUE_ATOF (\"9223372036854775808.0\", SFmode), SFmode))); + REAL_VALUE_ATOF ("9223372036854775808.0", SFmode), SFmode))); emit_jump_insn (gen_blt (label1)); emit_insn (gen_subsf3 (temp, operands[1], CONST_DOUBLE_FROM_REAL_VALUE ( - REAL_VALUE_ATOF (\"18446744073709551616.0\", SFmode), SFmode))); + REAL_VALUE_ATOF ("18446744073709551616.0", SFmode), SFmode))); emit_insn (gen_fix_truncsfdi2_ieee (operands[0], temp, GEN_INT(7))); emit_jump (label2); @@ -2763,23 +2730,22 @@ emit_insn (gen_fix_truncsfdi2_ieee (operands[0], operands[1], GEN_INT(5))); emit_label (label2); DONE; -}") +}) (define_expand "fix_truncsfdi2" [(set (match_operand:DI 0 "register_operand" "") (fix:DI (match_operand:SF 1 "nonimmediate_operand" "")))] "TARGET_64BIT && TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT" - " { operands[1] = force_reg (SFmode, operands[1]); emit_insn (gen_fix_truncsfdi2_ieee (operands[0], operands[1], GEN_INT(5))); DONE; -}") +}) (define_insn "fix_truncsfdi2_ieee" [(set (match_operand:DI 0 "register_operand" "=d") (fix:DI (match_operand:SF 1 "register_operand" "f"))) - (unspec:DI [(match_operand:DI 2 "immediate_operand" "K")] 1) + (unspec:DI [(match_operand:DI 2 "immediate_operand" "K")] UNSPEC_ROUND) (clobber (reg:CC 33))] "TARGET_64BIT && TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT" "cgebr\\t%0,%h2,%1" @@ -2794,7 +2760,6 @@ [(set (match_operand:SI 0 "register_operand" "") (unsigned_fix:SI (match_operand:SF 1 "register_operand" "")))] "TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT" - " { rtx label1 = gen_label_rtx (); rtx label2 = gen_label_rtx (); @@ -2803,11 +2768,11 @@ operands[1] = force_reg (SFmode, operands[1]); emit_insn (gen_cmpsf (operands[1], CONST_DOUBLE_FROM_REAL_VALUE ( - REAL_VALUE_ATOF (\"2147483648.0\", SFmode), SFmode))); + REAL_VALUE_ATOF ("2147483648.0", SFmode), SFmode))); emit_jump_insn (gen_blt (label1)); emit_insn (gen_subsf3 (temp, operands[1], CONST_DOUBLE_FROM_REAL_VALUE ( - REAL_VALUE_ATOF (\"4294967296.0\", SFmode), SFmode))); + REAL_VALUE_ATOF ("4294967296.0", SFmode), SFmode))); emit_insn (gen_fix_truncsfsi2_ieee (operands[0], temp, GEN_INT (7))); emit_jump (label2); @@ -2815,13 +2780,12 @@ emit_insn (gen_fix_truncsfsi2_ieee (operands[0], operands[1], GEN_INT (5))); emit_label (label2); DONE; -}") +}) (define_expand "fix_truncsfsi2" [(set (match_operand:SI 0 "register_operand" "") (fix:SI (match_operand:SF 1 "nonimmediate_operand" "")))] "TARGET_HARD_FLOAT" - " { if (TARGET_IBM_FLOAT) { @@ -2837,12 +2801,12 @@ } DONE; -}") +}) (define_insn "fix_truncsfsi2_ieee" [(set (match_operand:SI 0 "register_operand" "=d") (fix:SI (match_operand:SF 1 "register_operand" "f"))) - (unspec:SI [(match_operand:SI 2 "immediate_operand" "K")] 1) + (unspec:SI [(match_operand:SI 2 "immediate_operand" "K")] UNSPEC_ROUND) (clobber (reg:CC 33))] "TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT" "cfebr\\t%0,%h2,%1" @@ -2885,7 +2849,6 @@ (float:DF (match_operand:SI 1 "register_operand" ""))) (clobber (reg:CC 33))])] "TARGET_HARD_FLOAT" - " { if (TARGET_IBM_FLOAT) { @@ -2897,7 +2860,7 @@ emit_insn (gen_floatsidf2_ibm (operands[0], operands[1], two31, temp)); DONE; } -}") +}) (define_insn "floatsidf2_ieee" [(set (match_operand:DF 0 "register_operand" "=f") @@ -2915,14 +2878,13 @@ (use (match_operand:BLK 3 "memory_operand" "m")) (clobber (reg:CC 33))] "TARGET_HARD_FLOAT && TARGET_IBM_FLOAT" - "* { - output_asm_insn (\"st\\t%1,%N3\", operands); - output_asm_insn (\"xi\\t%N3,128\", operands); - output_asm_insn (\"mvc\\t%O3(4,%R3),%2\", operands); - output_asm_insn (\"ld\\t%0,%3\", operands); - return \"sd\\t%0,%2\"; -}" + output_asm_insn ("st\\t%1,%N3", operands); + output_asm_insn ("xi\\t%N3,128", operands); + output_asm_insn ("mvc\\t%O3(4,%R3),%2", operands); + output_asm_insn ("ld\\t%0,%3", operands); + return "sd\\t%0,%2"; +} [(set_attr "op_type" "NN") (set_attr "type" "other" ) (set_attr "atype" "agen") @@ -2938,7 +2900,6 @@ (float:SF (match_operand:SI 1 "register_operand" ""))) (clobber (reg:CC 33))])] "TARGET_HARD_FLOAT" - " { if (TARGET_IBM_FLOAT) { @@ -2948,7 +2909,7 @@ emit_insn (gen_truncdfsf2 (operands[0], temp)); DONE; } -}") +}) (define_insn "floatsisf2_ieee" [(set (match_operand:SF 0 "register_operand" "=f") @@ -2994,14 +2955,13 @@ [(set (match_operand:DF 0 "register_operand" "") (float_extend:DF (match_operand:SF 1 "nonimmediate_operand" "")))] "TARGET_HARD_FLOAT" - " { if (TARGET_IBM_FLOAT) { emit_insn (gen_extendsfdf2_ibm (operands[0], operands[1])); DONE; } -}") +}) (define_insn "extendsfdf2_ieee" [(set (match_operand:DF 0 "register_operand" "=f,f") @@ -3233,11 +3193,10 @@ (match_operand:DI 1 "s390_plus_operand" "") (match_operand:DI 2 "register_operand" "=&a")])] "TARGET_64BIT" - " { s390_expand_plus_operand (operands[0], operands[1], operands[2]); DONE; -}") +}) ; @@ -3461,11 +3420,10 @@ (match_operand:SI 1 "s390_plus_operand" "") (match_operand:SI 2 "register_operand" "=&a")])] "!TARGET_64BIT" - " { s390_expand_plus_operand (operands[0], operands[1], operands[2]); DONE; -}") +}) ; @@ -3902,7 +3860,6 @@ (mult:DI (sign_extend:DI (match_operand:SI 1 "nonimmediate_operand" "")) (sign_extend:DI (match_operand:SI 2 "nonimmediate_operand" ""))))] "!TARGET_64BIT" - " { rtx insn; @@ -3916,7 +3873,7 @@ gen_rtx_SIGN_EXTEND (DImode, operands[2])), REG_NOTES (insn)); DONE; -}") +}) (define_insn "mulsi_6432" [(set (match_operand:DI 0 "register_operand" "=d,d") @@ -4022,7 +3979,6 @@ (mod:DI (match_dup 1) (match_dup 2)))]) (clobber (match_dup 4))] "TARGET_64BIT" - " { rtx insn, div_equal, mod_equal, equal; @@ -4051,7 +4007,7 @@ gen_rtx_EXPR_LIST (REG_EQUAL, mod_equal, REG_NOTES (insn)); DONE; -}") +}) (define_insn "divmodtidi3" [(set (match_operand:TI 0 "register_operand" "=d,d") @@ -4101,7 +4057,6 @@ (umod:DI (match_dup 1) (match_dup 2)))]) (clobber (match_dup 4))] "TARGET_64BIT" - " { rtx insn, div_equal, mod_equal, equal; @@ -4130,7 +4085,7 @@ gen_rtx_EXPR_LIST (REG_EQUAL, mod_equal, REG_NOTES (insn)); DONE; -}") +}) (define_insn "udivmodtidi3" [(set (match_operand:TI 0 "register_operand" "=d,d") @@ -4163,7 +4118,6 @@ (mod:SI (match_dup 1) (match_dup 2)))]) (clobber (match_dup 4))] "!TARGET_64BIT" - " { rtx insn, div_equal, mod_equal, equal; @@ -4190,7 +4144,7 @@ gen_rtx_EXPR_LIST (REG_EQUAL, mod_equal, REG_NOTES (insn)); DONE; -}") +}) (define_insn "divmoddisi3" [(set (match_operand:DI 0 "register_operand" "=d,d") @@ -4222,7 +4176,6 @@ (match_operand:SI 2 "general_operand" ""))) (clobber (match_dup 3))] "!TARGET_64BIT" - " { rtx insn, udiv_equal, umod_equal, equal; @@ -4306,7 +4259,7 @@ } emit_move_insn (operands[0], operands[0]); DONE; -}") +}) (define_expand "umodsi3" [(set (match_operand:SI 0 "register_operand" "=d") @@ -4314,7 +4267,6 @@ (match_operand:SI 2 "nonimmediate_operand" ""))) (clobber (match_dup 3))] "!TARGET_64BIT" - " { rtx insn, udiv_equal, umod_equal, equal; @@ -4398,7 +4350,7 @@ emit_label (label3); } DONE; -}") +}) ; ; divdf3 instruction pattern(s). @@ -4514,20 +4466,19 @@ (match_operand:DI 2 "immediate_operand" "n"))) (clobber (reg:CC 33))] "TARGET_64BIT && s390_single_hi (operands[2], DImode, -1) >= 0" - "* { int part = s390_single_hi (operands[2], DImode, -1); operands[2] = GEN_INT (s390_extract_hi (operands[2], DImode, part)); switch (part) { - case 0: return \"nihh\\t%0,%x2\"; - case 1: return \"nihl\\t%0,%x2\"; - case 2: return \"nilh\\t%0,%x2\"; - case 3: return \"nill\\t%0,%x2\"; + case 0: return "nihh\\t%0,%x2"; + case 1: return "nihl\\t%0,%x2"; + case 2: return "nilh\\t%0,%x2"; + case 3: return "nill\\t%0,%x2"; default: abort (); } -}" +} [(set_attr "op_type" "RI")]) (define_insn "anddi3" @@ -4596,18 +4547,17 @@ (match_operand:SI 2 "immediate_operand" "n"))) (clobber (reg:CC 33))] "TARGET_64BIT && s390_single_hi (operands[2], SImode, -1) >= 0" - "* { int part = s390_single_hi (operands[2], SImode, -1); operands[2] = GEN_INT (s390_extract_hi (operands[2], SImode, part)); switch (part) { - case 0: return \"nilh\\t%0,%x2\"; - case 1: return \"nill\\t%0,%x2\"; + case 0: return "nilh\\t%0,%x2"; + case 1: return "nill\\t%0,%x2"; default: abort (); } -}" +} [(set_attr "op_type" "RI")]) (define_insn "andsi3" @@ -4770,20 +4720,19 @@ (match_operand:DI 2 "immediate_operand" "n"))) (clobber (reg:CC 33))] "TARGET_64BIT && s390_single_hi (operands[2], DImode, 0) >= 0" - "* { int part = s390_single_hi (operands[2], DImode, 0); operands[2] = GEN_INT (s390_extract_hi (operands[2], DImode, part)); switch (part) { - case 0: return \"oihh\\t%0,%x2\"; - case 1: return \"oihl\\t%0,%x2\"; - case 2: return \"oilh\\t%0,%x2\"; - case 3: return \"oill\\t%0,%x2\"; + case 0: return "oihh\\t%0,%x2"; + case 1: return "oihl\\t%0,%x2"; + case 2: return "oilh\\t%0,%x2"; + case 3: return "oill\\t%0,%x2"; default: abort (); } -}" +} [(set_attr "op_type" "RI")]) (define_insn "iordi3" @@ -4852,18 +4801,17 @@ (match_operand:SI 2 "immediate_operand" "n"))) (clobber (reg:CC 33))] "TARGET_64BIT && s390_single_hi (operands[2], SImode, 0) >= 0" - "* { int part = s390_single_hi (operands[2], SImode, 0); operands[2] = GEN_INT (s390_extract_hi (operands[2], SImode, part)); switch (part) { - case 0: return \"oilh\\t%0,%x2\"; - case 1: return \"oill\\t%0,%x2\"; + case 0: return "oilh\\t%0,%x2"; + case 1: return "oill\\t%0,%x2"; default: abort (); } -}" +} [(set_attr "op_type" "RI")]) (define_insn "iorsi3" @@ -5208,18 +5156,17 @@ (neg:DI (match_operand:DI 1 "register_operand" "d"))) (clobber (reg:CC 33))] "!TARGET_64BIT" - "* { rtx xop[1]; xop[0] = gen_label_rtx (); - output_asm_insn (\"lcr\\t%0,%1\", operands); - output_asm_insn (\"lcr\\t%N0,%N1\", operands); - output_asm_insn (\"je\\t%l0\", xop); - output_asm_insn (\"bctr\\t%0,0\", operands); - (*targetm.asm_out.internal_label) (asm_out_file, \"L\", + output_asm_insn ("lcr\\t%0,%1", operands); + output_asm_insn ("lcr\\t%N0,%N1", operands); + output_asm_insn ("je\\t%l0", xop); + output_asm_insn ("bctr\\t%0,0", operands); + (*targetm.asm_out.internal_label) (asm_out_file, "L", CODE_LABEL_NUMBER (xop[0])); - return \"\"; -}" + return ""; +} [(set_attr "op_type" "NN") (set_attr "type" "other") (set_attr "length" "10")]) @@ -5760,7 +5707,7 @@ (label_ref (match_operand 0 "" "")) (pc)))] "" - "{ operands[1] = s390_compare_op0; operands[2] = s390_compare_op1; }") + "operands[1] = s390_compare_op0; operands[2] = s390_compare_op1;") (define_expand "bne" [(set (reg:CCZ 33) (compare:CCZ (match_dup 1) (match_dup 2))) @@ -5769,7 +5716,7 @@ (label_ref (match_operand 0 "" "")) (pc)))] "" - "{ operands[1] = s390_compare_op0; operands[2] = s390_compare_op1; }") + "operands[1] = s390_compare_op0; operands[2] = s390_compare_op1;") (define_expand "bgt" [(set (reg:CCS 33) (compare:CCS (match_dup 1) (match_dup 2))) @@ -5778,7 +5725,7 @@ (label_ref (match_operand 0 "" "")) (pc)))] "" - "{ operands[1] = s390_compare_op0; operands[2] = s390_compare_op1; }") + "operands[1] = s390_compare_op0; operands[2] = s390_compare_op1;") (define_expand "bgtu" [(set (reg:CCU 33) (compare:CCU (match_dup 1) (match_dup 2))) @@ -5787,7 +5734,7 @@ (label_ref (match_operand 0 "" "")) (pc)))] "" - "{ operands[1] = s390_compare_op0; operands[2] = s390_compare_op1; }") + "operands[1] = s390_compare_op0; operands[2] = s390_compare_op1;") (define_expand "blt" [(set (reg:CCS 33) (compare:CCS (match_dup 1) (match_dup 2))) @@ -5796,7 +5743,7 @@ (label_ref (match_operand 0 "" "")) (pc)))] "" - "{ operands[1] = s390_compare_op0; operands[2] = s390_compare_op1; }") + "operands[1] = s390_compare_op0; operands[2] = s390_compare_op1;") (define_expand "bltu" [(set (reg:CCU 33) (compare:CCU (match_dup 1) (match_dup 2))) @@ -5805,7 +5752,7 @@ (label_ref (match_operand 0 "" "")) (pc)))] "" - "{ operands[1] = s390_compare_op0; operands[2] = s390_compare_op1; }") + "operands[1] = s390_compare_op0; operands[2] = s390_compare_op1;") (define_expand "bge" [(set (reg:CCS 33) (compare:CCS (match_dup 1) (match_dup 2))) @@ -5814,7 +5761,7 @@ (label_ref (match_operand 0 "" "")) (pc)))] "" - "{ operands[1] = s390_compare_op0; operands[2] = s390_compare_op1; }") + "operands[1] = s390_compare_op0; operands[2] = s390_compare_op1;") (define_expand "bgeu" [(set (reg:CCU 33) (compare:CCU (match_dup 1) (match_dup 2))) @@ -5823,7 +5770,7 @@ (label_ref (match_operand 0 "" "")) (pc)))] "" - "{ operands[1] = s390_compare_op0; operands[2] = s390_compare_op1; }") + "operands[1] = s390_compare_op0; operands[2] = s390_compare_op1;") (define_expand "ble" [(set (reg:CCS 33) (compare:CCS (match_dup 1) (match_dup 2))) @@ -5832,7 +5779,7 @@ (label_ref (match_operand 0 "" "")) (pc)))] "" - "{ operands[1] = s390_compare_op0; operands[2] = s390_compare_op1; }") + "operands[1] = s390_compare_op0; operands[2] = s390_compare_op1;") (define_expand "bleu" [(set (reg:CCU 33) (compare:CCU (match_dup 1) (match_dup 2))) @@ -5841,7 +5788,7 @@ (label_ref (match_operand 0 "" "")) (pc)))] "" - "{ operands[1] = s390_compare_op0; operands[2] = s390_compare_op1; }") + "operands[1] = s390_compare_op0; operands[2] = s390_compare_op1;") (define_expand "bunordered" [(set (reg:CCS 33) (compare:CCS (match_dup 1) (match_dup 2))) @@ -5850,7 +5797,7 @@ (label_ref (match_operand 0 "" "")) (pc)))] "" - "{ operands[1] = s390_compare_op0; operands[2] = s390_compare_op1; }") + "operands[1] = s390_compare_op0; operands[2] = s390_compare_op1;") (define_expand "bordered" [(set (reg:CCS 33) (compare:CCS (match_dup 1) (match_dup 2))) @@ -5859,7 +5806,7 @@ (label_ref (match_operand 0 "" "")) (pc)))] "" - "{ operands[1] = s390_compare_op0; operands[2] = s390_compare_op1; }") + "operands[1] = s390_compare_op0; operands[2] = s390_compare_op1;") (define_expand "buneq" [(set (reg:CCS 33) (compare:CCS (match_dup 1) (match_dup 2))) @@ -5868,7 +5815,7 @@ (label_ref (match_operand 0 "" "")) (pc)))] "" - "{ operands[1] = s390_compare_op0; operands[2] = s390_compare_op1; }") + "operands[1] = s390_compare_op0; operands[2] = s390_compare_op1;") (define_expand "bungt" [(set (reg:CCS 33) (compare:CCS (match_dup 1) (match_dup 2))) @@ -5877,7 +5824,7 @@ (label_ref (match_operand 0 "" "")) (pc)))] "" - "{ operands[1] = s390_compare_op0; operands[2] = s390_compare_op1; }") + "operands[1] = s390_compare_op0; operands[2] = s390_compare_op1;") (define_expand "bunlt" [(set (reg:CCS 33) (compare:CCS (match_dup 1) (match_dup 2))) @@ -5886,7 +5833,7 @@ (label_ref (match_operand 0 "" "")) (pc)))] "" - "{ operands[1] = s390_compare_op0; operands[2] = s390_compare_op1; }") + "operands[1] = s390_compare_op0; operands[2] = s390_compare_op1;") (define_expand "bunge" [(set (reg:CCS 33) (compare:CCS (match_dup 1) (match_dup 2))) @@ -5895,7 +5842,7 @@ (label_ref (match_operand 0 "" "")) (pc)))] "" - "{ operands[1] = s390_compare_op0; operands[2] = s390_compare_op1; }") + "operands[1] = s390_compare_op0; operands[2] = s390_compare_op1;") (define_expand "bunle" [(set (reg:CCS 33) (compare:CCS (match_dup 1) (match_dup 2))) @@ -5904,7 +5851,7 @@ (label_ref (match_operand 0 "" "")) (pc)))] "" - "{ operands[1] = s390_compare_op0; operands[2] = s390_compare_op1; }") + "operands[1] = s390_compare_op0; operands[2] = s390_compare_op1;") (define_expand "bltgt" [(set (reg:CCS 33) (compare:CCS (match_dup 1) (match_dup 2))) @@ -5913,7 +5860,7 @@ (label_ref (match_operand 0 "" "")) (pc)))] "" - "{ operands[1] = s390_compare_op0; operands[2] = s390_compare_op1; }") + "operands[1] = s390_compare_op0; operands[2] = s390_compare_op1;") ;; @@ -5927,15 +5874,14 @@ (label_ref (match_operand 0 "" "")) (pc)))] "" - "* { if (get_attr_length (insn) == 4) - return \"j%C1\\t%l0\"; + return "j%C1\\t%l0"; else if (TARGET_64BIT) - return \"jg%C1\\t%l0\"; + return "jg%C1\\t%l0"; else abort (); -}" +} [(set_attr "op_type" "RI") (set_attr "type" "branch") (set (attr "length") @@ -5953,13 +5899,12 @@ (match_operand 0 "address_operand" "U") (pc)))] "" - "* { if (get_attr_op_type (insn) == OP_TYPE_RR) - return \"b%C1r\\t%0\"; + return "b%C1r\\t%0"; else - return \"b%C1\\t%a0\"; -}" + return "b%C1\\t%a0"; +} [(set (attr "op_type") (if_then_else (match_operand 0 "register_operand" "") (const_string "RR") (const_string "RX"))) @@ -5978,15 +5923,14 @@ (pc) (label_ref (match_operand 0 "" ""))))] "" - "* { if (get_attr_length (insn) == 4) - return \"j%D1\\t%l0\"; + return "j%D1\\t%l0"; else if (TARGET_64BIT) - return \"jg%D1\\t%l0\"; + return "jg%D1\\t%l0"; else abort (); -}" +} [(set_attr "op_type" "RI") (set_attr "type" "branch") (set (attr "length") @@ -6004,13 +5948,12 @@ (pc) (match_operand 0 "address_operand" "U")))] "" - "* { if (get_attr_op_type (insn) == OP_TYPE_RR) - return \"b%D1r\\t%0\"; + return "b%D1r\\t%0"; else - return \"b%D1\\t%a0\"; -}" + return "b%D1\\t%a0"; +} [(set (attr "op_type") (if_then_else (match_operand 0 "register_operand" "") (const_string "RR") (const_string "RX"))) @@ -6034,7 +5977,6 @@ [(match_dup 2) (const_int 0)]) (match_operand:SI 1 "general_operand" ""))] "" - " { enum machine_mode ccmode; @@ -6044,7 +5986,7 @@ s390_compare_op0, s390_compare_op1); operands[2] = gen_rtx_REG (ccmode, 33); operands[3] = gen_rtx_COMPARE (ccmode, s390_compare_op0, s390_compare_op1); -}") +}) (define_insn "*trap" [(trap_if (match_operator 0 "comparison_operator" [(reg 33) (const_int 0)]) @@ -6067,7 +6009,6 @@ (use (match_operand 3 "" "")) ; loop level (use (match_operand 4 "" ""))] ; label "" - " { if (GET_MODE (operands[0]) == SImode) emit_jump_insn (gen_doloop_si (operands[4], operands[0], operands[0])); @@ -6077,7 +6018,7 @@ FAIL; DONE; -}") +}) (define_insn "doloop_si" [(set (pc) @@ -6091,15 +6032,14 @@ (clobber (match_scratch:SI 3 "=X,&d")) (clobber (reg:CC 33))] "" - "* { if (which_alternative != 0) - return \"#\"; + return "#"; else if (get_attr_length (insn) == 4) - return \"brct\\t%1,%l0\"; + return "brct\\t%1,%l0"; else abort (); -}" +} [(set_attr "op_type" "RI") (set_attr "type" "branch") (set (attr "length") @@ -6122,13 +6062,12 @@ (clobber (match_scratch:SI 3 "=X,&d")) (clobber (reg:CC 33))] "" - "* { if (get_attr_op_type (insn) == OP_TYPE_RR) - return \"bctr\\t%1,%0\"; + return "bctr\\t%1,%0"; else - return \"bct\\t%1,%a0\"; -}" + return "bct\\t%1,%a0"; +} [(set (attr "op_type") (if_then_else (match_operand 0 "register_operand" "") (const_string "RR") (const_string "RX"))) @@ -6171,15 +6110,14 @@ (clobber (match_scratch:DI 3 "=X,&d")) (clobber (reg:CC 33))] "TARGET_64BIT" - "* { if (which_alternative != 0) - return \"#\"; + return "#"; else if (get_attr_length (insn) == 4) - return \"brctg\\t%1,%l0\"; + return "brctg\\t%1,%l0"; else abort (); -}" +} [(set_attr "op_type" "RI") (set_attr "type" "branch") (set (attr "length") @@ -6198,13 +6136,12 @@ (clobber (match_scratch:DI 3 "=X,&d")) (clobber (reg:CC 33))] "" - "* { if (get_attr_op_type (insn) == OP_TYPE_RRE) - return \"bctgr\\t%1,%0\"; + return "bctgr\\t%1,%0"; else - return \"bctg\\t%1,%a0\"; -}" + return "bctg\\t%1,%a0"; +} [(set (attr "op_type") (if_then_else (match_operand 0 "register_operand" "") (const_string "RRE") (const_string "RXE"))) @@ -6246,15 +6183,14 @@ (define_insn "jump" [(set (pc) (label_ref (match_operand 0 "" "")))] "" - "* { if (get_attr_length (insn) == 4) - return \"j\\t%l0\"; + return "j\\t%l0"; else if (TARGET_64BIT) - return \"jg\\t%l0\"; + return "jg\\t%l0"; else abort (); -}" +} [(set_attr "op_type" "RI") (set_attr "type" "branch") (set (attr "length") @@ -6272,13 +6208,12 @@ (define_insn "indirect_jump" [(set (pc) (match_operand 0 "address_operand" "U"))] "" - "* { if (get_attr_op_type (insn) == OP_TYPE_RR) - return \"br\\t%0\"; + return "br\\t%0"; else - return \"b\\t%a0\"; -}" + return "b\\t%a0"; +} [(set (attr "op_type") (if_then_else (match_operand 0 "register_operand" "") (const_string "RR") (const_string "RX"))) @@ -6293,13 +6228,12 @@ [(set (pc) (match_operand 0 "address_operand" "U")) (use (label_ref (match_operand 1 "" "")))] "" - "* { if (get_attr_op_type (insn) == OP_TYPE_RR) - return \"br\\t%0\"; + return "br\\t%0"; else - return \"b\\t%a0\"; -}" + return "b\\t%a0"; +} [(set (attr "op_type") (if_then_else (match_operand 0 "register_operand" "") (const_string "RR") (const_string "RX"))) @@ -6313,7 +6247,6 @@ (label_ref (match_operand 3 "" "")) (label_ref (match_operand 4 "" ""))] "" - " { rtx index = gen_reg_rtx (SImode); rtx base = gen_reg_rtx (Pmode); @@ -6344,7 +6277,7 @@ emit_jump_insn (gen_casesi_jump (target, operands[3])); DONE; -}") +}) ;; @@ -6363,7 +6296,6 @@ (match_operand 1 "" "") (match_operand 2 "" "")])] "" - " { int i; @@ -6382,13 +6314,13 @@ emit_insn (gen_blockage ()); DONE; -}") +}) ;; UNSPEC_VOLATILE is considered to use and clobber all hard registers and ;; all of memory. This blocks insns from being moved across this point. (define_insn "blockage" - [(unspec_volatile [(const_int 0)] 0)] + [(unspec_volatile [(const_int 0)] UNSPECV_BLOCKAGE)] "" "" [(set_attr "type" "none") @@ -6405,7 +6337,6 @@ (match_operand 1 "" "")) (use (match_operand 2 "" ""))] "" - " { rtx insn; @@ -6439,7 +6370,7 @@ insn = emit_call_insn (gen_call_exp (operands[0], operands[1], gen_rtx_REG (Pmode, RETURN_REGNUM))); DONE; -}") +}) (define_expand "call_exp" [(parallel [(call (match_operand 0 "" "") @@ -6515,7 +6446,6 @@ (match_operand 2 "" ""))) (use (match_operand 3 "" ""))] "" - " { rtx insn; @@ -6550,7 +6480,7 @@ gen_call_value_exp (operands[0], operands[1], operands[2], gen_rtx_REG (Pmode, RETURN_REGNUM))); DONE; -}") +}) (define_expand "call_value_exp" [(parallel [(set (match_operand 0 "" "") @@ -6693,7 +6623,6 @@ (call (const_int 0) (const_int 0))) (use (match_operand 1 "" ""))] "" - " { rtx insn, sym; @@ -6729,7 +6658,7 @@ CONST_OR_PURE_CALL_P (insn) = 1; DONE; -}") +}) (define_expand "call_value_tls_exp" [(parallel [(set (match_operand 0 "" "") @@ -6823,7 +6752,6 @@ (set (match_operand 0 "general_operand" "") (reg 15))] "" - " { rtx stack = gen_rtx (REG, Pmode, STACK_POINTER_REGNUM); rtx chain = gen_rtx (MEM, Pmode, stack); @@ -6840,7 +6768,7 @@ emit_move_insn (operands[0], virtual_stack_dynamic_rtx); DONE; -}") +}) ; @@ -6919,17 +6847,15 @@ (set (match_dup 0) (match_operand 1 "register_operand" "")) (set (match_dup 3) (match_dup 2))] "" - " { operands[2] = gen_reg_rtx (Pmode); operands[3] = gen_rtx_MEM (Pmode, operands[0]); -}") +}) (define_expand "save_stack_nonlocal" [(match_operand 0 "memory_operand" "") (match_operand 1 "register_operand" "")] "" - " { rtx temp = gen_reg_rtx (Pmode); @@ -6942,13 +6868,12 @@ TARGET_64BIT ? TImode : DImode), operands[1]); DONE; -}") +}) (define_expand "restore_stack_nonlocal" [(match_operand 0 "register_operand" "") (match_operand 1 "memory_operand" "")] "" - " { rtx temp = gen_reg_rtx (Pmode); @@ -6961,7 +6886,7 @@ TARGET_64BIT ? TImode : DImode)); emit_move_insn (gen_rtx_MEM (Pmode, operands[0]), temp); DONE; -}") +}) ; @@ -7122,20 +7047,12 @@ (define_expand "prologue" [(use (const_int 0))] "" - " -{ - s390_emit_prologue (); - DONE; -}") + "s390_emit_prologue (); DONE;") (define_expand "epilogue" [(use (const_int 1))] "" - " -{ - s390_emit_epilogue (); - DONE; -}") + "s390_emit_epilogue (); DONE;") (define_insn "*return_si" @@ -7205,16 +7122,9 @@ [(set (match_operand:DI 0 "register_operand" "=r") (match_operand:SI 1 "register_operand" "r"))] "" - " { - /* - emit_insn (gen_zero_extendsidi2 (operands[0], operands[1])); - emit_insn (gen_anddi3 (operands[0], operands[0], GEN_INT (0x7fffffff))); - */ - emit_insn (gen_anddi3 (operands[0], gen_lowpart (DImode, operands[1]), GEN_INT (0x7fffffff))); - DONE; -}") +}) -- 2.7.4