From 1097820739d8c8feba6a0636eb3593627201a542 Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Thu, 11 Oct 2001 14:49:36 -0700 Subject: [PATCH] i386.md (setcc splitters): Add four splitters to simplify compound compares that simplify_comparison can't... * config/i386/i386.md (setcc splitters): Add four splitters to simplify compound compares that simplify_comparison can't handle. From-SVN: r46203 --- gcc/ChangeLog | 5 ++++ gcc/config/i386/i386.md | 70 +++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 75 insertions(+) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 515710d..8992aa8 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2001-10-11 Richard Henderson + + * config/i386/i386.md (setcc splitters): Add four splitters to + simplify compound compares that simplify_comparison can't handle. + 2001-10-11 Zack Weinberg * cpplex.c (digraph_spellings, token_spellings): Make static. diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 10c1b35..01a9be0 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -12542,6 +12542,76 @@ [(set_attr "type" "setcc") (set_attr "mode" "QI")]) +;; In general it is not safe to assume too much about CCmode registers, +;; so simplify-rtx stops when it sees a second one. Under certain +;; conditions this is safe on x86, so help combine not create +;; +;; seta %al +;; testb %al, %al +;; sete %al + +(define_split + [(set (match_operand:QI 0 "nonimmediate_operand" "") + (ne:QI (match_operator 1 "ix86_comparison_operator" + [(reg 17) (const_int 0)]) + (const_int 0)))] + "" + [(set (match_dup 0) (match_dup 1))] +{ + PUT_MODE (operands[1], QImode); +}) + +(define_split + [(set (strict_low_part (match_operand:QI 0 "nonimmediate_operand" "")) + (ne:QI (match_operator 1 "ix86_comparison_operator" + [(reg 17) (const_int 0)]) + (const_int 0)))] + "" + [(set (match_dup 0) (match_dup 1))] +{ + PUT_MODE (operands[1], QImode); +}) + +(define_split + [(set (match_operand:QI 0 "nonimmediate_operand" "") + (eq:QI (match_operator 1 "ix86_comparison_operator" + [(reg 17) (const_int 0)]) + (const_int 0)))] + "" + [(set (match_dup 0) (match_dup 1))] +{ + rtx new_op1 = copy_rtx (operands[1]); + operands[1] = new_op1; + PUT_MODE (new_op1, QImode); + PUT_CODE (new_op1, REVERSE_CONDITION (GET_CODE (new_op1), + GET_MODE (XEXP (new_op1, 0)))); + + /* Make sure that (a) the CCmode we have for the flags is strong + enough for the reversed compare or (b) we have a valid FP compare. */ + if (! ix86_comparison_operator (new_op1, VOIDmode)) + FAIL; +}) + +(define_split + [(set (strict_low_part (match_operand:QI 0 "nonimmediate_operand" "")) + (eq:QI (match_operator 1 "ix86_comparison_operator" + [(reg 17) (const_int 0)]) + (const_int 0)))] + "" + [(set (match_dup 0) (match_dup 1))] +{ + rtx new_op1 = copy_rtx (operands[1]); + operands[1] = new_op1; + PUT_MODE (new_op1, QImode); + PUT_CODE (new_op1, REVERSE_CONDITION (GET_CODE (new_op1), + GET_MODE (XEXP (new_op1, 0)))); + + /* Make sure that (a) the CCmode we have for the flags is strong + enough for the reversed compare or (b) we have a valid FP compare. */ + if (! ix86_comparison_operator (new_op1, VOIDmode)) + FAIL; +}) + ;; The SSE store flag instructions saves 0 or 0xffffffff to the result. ;; subsequent logical operations are used to imitate conditional moves. ;; 0xffffffff is NaN, but not in normalized form, so we can't represent -- 2.7.4