From 106b63de3ad19c2765329958ce5632b8a905c73f Mon Sep 17 00:00:00 2001 From: Simon Pilgrim Date: Mon, 22 Feb 2021 10:24:58 +0000 Subject: [PATCH] [InstCombine] Add smulo NumSignBits test from D97170 --- llvm/test/Transforms/InstCombine/with_overflow.ll | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/llvm/test/Transforms/InstCombine/with_overflow.ll b/llvm/test/Transforms/InstCombine/with_overflow.ll index 4553c9f..12db6b7 100644 --- a/llvm/test/Transforms/InstCombine/with_overflow.ll +++ b/llvm/test/Transforms/InstCombine/with_overflow.ll @@ -330,6 +330,21 @@ define i1 @overflow_mod_overflow_mul(i32 %v1, i32 %v2) nounwind { ret i1 %obit } +define i1 @overflow_mod_mul2(i16 %v1, i32 %v2) nounwind { +; CHECK-LABEL: @overflow_mod_mul2( +; CHECK-NEXT: [[A:%.*]] = sext i16 [[V1:%.*]] to i32 +; CHECK-NEXT: [[REM:%.*]] = srem i32 [[A]], [[V2:%.*]] +; CHECK-NEXT: [[T:%.*]] = call { i32, i1 } @llvm.smul.with.overflow.i32(i32 [[REM]], i32 [[REM]]) +; CHECK-NEXT: [[OBIT:%.*]] = extractvalue { i32, i1 } [[T]], 1 +; CHECK-NEXT: ret i1 [[OBIT]] +; + %a = sext i16 %v1 to i32 + %rem = srem i32 %a, %v2 + %t = call { i32, i1 } @llvm.smul.with.overflow.i32(i32 %rem, i32 %rem) + %obit = extractvalue { i32, i1 } %t, 1 + ret i1 %obit +} + define { i32, i1 } @ssubtest_reorder(i8 %a) { ; CHECK-LABEL: @ssubtest_reorder( ; CHECK-NEXT: [[AA:%.*]] = sext i8 [[A:%.*]] to i32 -- 2.7.4