From 10178117765c961cf0551bb1496af4aa14530173 Mon Sep 17 00:00:00 2001 From: Craig Topper Date: Tue, 25 Apr 2023 12:52:00 -0700 Subject: [PATCH] [RISCV] Add test case showing failure to fold (fadd (reduce -0.0, X), Y) due to one use check. NFC" If the -0.0 has multiple uses we won't fold the reduction. --- llvm/test/CodeGen/RISCV/rvv/fold-binary-reduce.ll | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/llvm/test/CodeGen/RISCV/rvv/fold-binary-reduce.ll b/llvm/test/CodeGen/RISCV/rvv/fold-binary-reduce.ll index ade4247..058263f 100644 --- a/llvm/test/CodeGen/RISCV/rvv/fold-binary-reduce.ll +++ b/llvm/test/CodeGen/RISCV/rvv/fold-binary-reduce.ll @@ -278,6 +278,28 @@ entry: ret float %res } +define float @reduce_fadd4(float %x, float %y, <4 x float> %v, <4 x float> %w) { +; CHECK-LABEL: reduce_fadd4: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, ma +; CHECK-NEXT: vmv.s.x v10, zero +; CHECK-NEXT: vfredusum.vs v8, v8, v10 +; CHECK-NEXT: vfmv.f.s fa5, v8 +; CHECK-NEXT: vfredusum.vs v8, v9, v10 +; CHECK-NEXT: vfmv.f.s fa4, v8 +; CHECK-NEXT: fadd.s fa5, fa5, fa0 +; CHECK-NEXT: fadd.s fa4, fa4, fa1 +; CHECK-NEXT: fdiv.s fa0, fa5, fa4 +; CHECK-NEXT: ret +entry: + %rdx = call fast float @llvm.vector.reduce.fadd.v4f32(float -0.0, <4 x float> %v) + %rdx2 = call fast float @llvm.vector.reduce.fadd.v4f32(float -0.0, <4 x float> %w) + %res = fadd fast float %rdx, %x + %res2 = fadd fast float %rdx2, %y + %div = fdiv fast float %res, %res2 + ret float %div +} + define float @reduce_fmax(float %x, <4 x float> %v) { ; CHECK-LABEL: reduce_fmax: ; CHECK: # %bb.0: # %entry -- 2.7.4