From 0fc123744e8fbe6dd933b5ef2892e4c70d2f2fb3 Mon Sep 17 00:00:00 2001 From: Niklas Cassel Date: Wed, 21 Feb 2018 09:59:53 +0100 Subject: [PATCH] ARM: dts: artpec: disable Accelerator Coherency Port Accesses via 0x80000000 go through the ACP instead of using the DDR directly. Unfortunately the ACP has proven to be the cause of complete system hangs. Disabling the ACP makes these problems go away. Signed-off-by: Niklas Cassel Signed-off-by: Arnd Bergmann --- arch/arm/boot/dts/artpec6.dtsi | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/artpec6.dtsi b/arch/arm/boot/dts/artpec6.dtsi index 2ed1177..d9776a9 100644 --- a/arch/arm/boot/dts/artpec6.dtsi +++ b/arch/arm/boot/dts/artpec6.dtsi @@ -185,8 +185,7 @@ #address-cells = <0x1>; #size-cells = <0x1>; ranges; - dma-ranges = <0x80000000 0x00000000 0x40000000>; - dma-coherent; + dma-ranges; ethernet: ethernet@f8010000 { clock-names = "phy_ref_clk", "apb_pclk"; -- 2.7.4