From 0f0ce4a9c63054d41fe0764e0591696b556ceaa5 Mon Sep 17 00:00:00 2001 From: "paul.lind" Date: Thu, 2 Apr 2015 11:45:02 -0700 Subject: [PATCH] MIPS: Remove unused J(Label *). Remove unused macro-asm instruction and associated address patching. On mips64, remove unused JumpLabelToJumpRegister(). On mips, rename it appropriately (it's still used there for JR->J optimizations). BUG= Review URL: https://codereview.chromium.org/1059433003 Cr-Commit-Position: refs/heads/master@{#27593} --- src/mips/assembler-mips-inl.h | 2 +- src/mips/assembler-mips.cc | 44 +++------------- src/mips/assembler-mips.h | 2 +- src/mips/macro-assembler-mips.cc | 18 ------- src/mips/macro-assembler-mips.h | 1 - src/mips64/assembler-mips64.cc | 79 +++------------------------- src/mips64/assembler-mips64.h | 2 - src/mips64/macro-assembler-mips64.cc | 18 ------- src/mips64/macro-assembler-mips64.h | 1 - 9 files changed, 15 insertions(+), 152 deletions(-) diff --git a/src/mips/assembler-mips-inl.h b/src/mips/assembler-mips-inl.h index 7b6b3f8c7..afca7d00a 100644 --- a/src/mips/assembler-mips-inl.h +++ b/src/mips/assembler-mips-inl.h @@ -123,7 +123,7 @@ void RelocInfo::apply(intptr_t delta, ICacheFlushMode icache_flush_mode) { uint32_t scope2 = reinterpret_cast(pc_) & ~kImm28Mask; if (scope1 != scope2) { - Assembler::JumpLabelToJumpRegister(pc_); + Assembler::JumpToJumpRegister(pc_); } } if (IsInternalReference(rmode_) || IsInternalReferenceEncoded(rmode_)) { diff --git a/src/mips/assembler-mips.cc b/src/mips/assembler-mips.cc index 96373579d..1955d5349 100644 --- a/src/mips/assembler-mips.cc +++ b/src/mips/assembler-mips.cc @@ -663,7 +663,7 @@ int Assembler::target_at(int pos, bool is_internal) { } } // Check we have a branch or jump instruction. - DCHECK(IsBranch(instr) || IsJ(instr) || IsLui(instr)); + DCHECK(IsBranch(instr) || IsLui(instr)); // Do NOT change this to <<2. We rely on arithmetic shifts here, assuming // the compiler uses arithmectic shifts for signed integers. if (IsBranch(instr)) { @@ -692,17 +692,8 @@ int Assembler::target_at(int pos, bool is_internal) { return pos - delta; } } else { - int32_t imm28 = (instr & static_cast(kImm26Mask)) << 2; - if (imm28 == kEndOfJumpChain) { - // EndOfChain sentinel is returned directly, not relative to pc or pos. - return kEndOfChain; - } else { - uint32_t instr_address = reinterpret_cast(buffer_ + pos); - instr_address &= kImm28Mask; - int delta = static_cast(instr_address - imm28); - DCHECK(pos > delta); - return pos - delta; - } + UNREACHABLE(); + return 0; } } @@ -724,7 +715,7 @@ void Assembler::target_at_put(int32_t pos, int32_t target_pos, return; } - DCHECK(IsBranch(instr) || IsJ(instr) || IsLui(instr)); + DCHECK(IsBranch(instr) || IsLui(instr)); if (IsBranch(instr)) { int32_t imm18 = target_pos - (pos + kBranchPCOffset); DCHECK((imm18 & 3) == 0); @@ -749,15 +740,7 @@ void Assembler::target_at_put(int32_t pos, int32_t target_pos, instr_at_put(pos + 1 * Assembler::kInstrSize, instr_ori | (imm & kImm16Mask)); } else { - uint32_t imm28 = reinterpret_cast(buffer_) + target_pos; - imm28 &= kImm28Mask; - DCHECK((imm28 & 3) == 0); - - instr &= ~kImm26Mask; - uint32_t imm26 = imm28 >> 2; - DCHECK(is_uint26(imm26)); - - instr_at_put(pos, instr | (imm26 & kImm26Mask)); + UNREACHABLE(); } } @@ -2418,21 +2401,6 @@ int Assembler::RelocateInternalReference(RelocInfo::Mode rmode, byte* pc, instr_at_put(pc + 1 * Assembler::kInstrSize, instr_ori | (imm & kImm16Mask)); return 2; // Number of instructions patched. - } else if (IsJ(instr)) { - uint32_t imm28 = (instr & static_cast(kImm26Mask)) << 2; - if (static_cast(imm28) == kEndOfJumpChain) { - return 0; // Number of instructions patched. - } - imm28 += pc_delta; - imm28 &= kImm28Mask; - DCHECK((imm28 & 3) == 0); - - instr &= ~kImm26Mask; - uint32_t imm26 = imm28 >> 2; - DCHECK(is_uint26(imm26)); - - instr_at_put(pc, instr | (imm26 & kImm26Mask)); - return 1; // Number of instructions patched. } else { UNREACHABLE(); return 0; @@ -2759,7 +2727,7 @@ void Assembler::set_target_address_at(Address pc, } -void Assembler::JumpLabelToJumpRegister(Address pc) { +void Assembler::JumpToJumpRegister(Address pc) { // Address pc points to lui/ori instructions. // Jump to label may follow at pc + 2 * kInstrSize. uint32_t* p = reinterpret_cast(pc); diff --git a/src/mips/assembler-mips.h b/src/mips/assembler-mips.h index 364888993..5d9cebacb 100644 --- a/src/mips/assembler-mips.h +++ b/src/mips/assembler-mips.h @@ -531,7 +531,7 @@ class Assembler : public AssemblerBase { // Return the code target address of the patch debug break slot inline static Address break_address_from_return_address(Address pc); - static void JumpLabelToJumpRegister(Address pc); + static void JumpToJumpRegister(Address pc); static void QuietNaN(HeapObject* nan); diff --git a/src/mips/macro-assembler-mips.cc b/src/mips/macro-assembler-mips.cc index 1585e3187..01086743a 100644 --- a/src/mips/macro-assembler-mips.cc +++ b/src/mips/macro-assembler-mips.cc @@ -3092,24 +3092,6 @@ void MacroAssembler::Ret(Condition cond, } -void MacroAssembler::J(Label* L, BranchDelaySlot bdslot) { - BlockTrampolinePoolScope block_trampoline_pool(this); - - uint32_t imm28; - imm28 = jump_address(L); - imm28 &= kImm28Mask; - { BlockGrowBufferScope block_buf_growth(this); - // Buffer growth (and relocation) must be blocked for internal references - // until associated instructions are emitted and available to be patched. - RecordRelocInfo(RelocInfo::INTERNAL_REFERENCE_ENCODED); - j(imm28); - } - // Emit a nop in the branch delay slot if required. - if (bdslot == PROTECT) - nop(); -} - - void MacroAssembler::Jr(Label* L, BranchDelaySlot bdslot) { BlockTrampolinePoolScope block_trampoline_pool(this); diff --git a/src/mips/macro-assembler-mips.h b/src/mips/macro-assembler-mips.h index ac0a50b4e..bb368ad2d 100644 --- a/src/mips/macro-assembler-mips.h +++ b/src/mips/macro-assembler-mips.h @@ -1633,7 +1633,6 @@ const Operand& rt = Operand(zero_reg), BranchDelaySlot bd = PROTECT void BranchAndLinkShort(Label* L, Condition cond, Register rs, const Operand& rt, BranchDelaySlot bdslot = PROTECT); - void J(Label* L, BranchDelaySlot bdslot); void Jr(Label* L, BranchDelaySlot bdslot); void Jalr(Label* L, BranchDelaySlot bdslot); diff --git a/src/mips64/assembler-mips64.cc b/src/mips64/assembler-mips64.cc index 2653f4ac3..51e85c9bf 100644 --- a/src/mips64/assembler-mips64.cc +++ b/src/mips64/assembler-mips64.cc @@ -637,7 +637,7 @@ int Assembler::target_at(int pos, bool is_internal) { } } // Check we have a branch or jump instruction. - DCHECK(IsBranch(instr) || IsJ(instr) || IsLui(instr)); + DCHECK(IsBranch(instr) || IsLui(instr)); // Do NOT change this to <<2. We rely on arithmetic shifts here, assuming // the compiler uses arithmetic shifts for signed integers. if (IsBranch(instr)) { @@ -673,17 +673,8 @@ int Assembler::target_at(int pos, bool is_internal) { return pos - delta; } } else { - int32_t imm28 = (instr & static_cast(kImm26Mask)) << 2; - if (imm28 == kEndOfJumpChain) { - // EndOfChain sentinel is returned directly, not relative to pc or pos. - return kEndOfChain; - } else { - uint64_t instr_address = reinterpret_cast(buffer_ + pos); - instr_address &= kImm28Mask; - int delta = static_cast(instr_address - imm28); - DCHECK(pos > delta); - return pos - delta; - } + UNREACHABLE(); + return 0; } } @@ -703,7 +694,7 @@ void Assembler::target_at_put(int pos, int target_pos, bool is_internal) { return; } - DCHECK(IsBranch(instr) || IsJ(instr) || IsLui(instr)); + DCHECK(IsBranch(instr) || IsLui(instr)); if (IsBranch(instr)) { int32_t imm18 = target_pos - (pos + kBranchPCOffset); DCHECK((imm18 & 3) == 0); @@ -734,15 +725,7 @@ void Assembler::target_at_put(int pos, int target_pos, bool is_internal) { instr_at_put(pos + 3 * Assembler::kInstrSize, instr_ori2 | (imm & kImm16Mask)); } else { - uint64_t imm28 = reinterpret_cast(buffer_) + target_pos; - imm28 &= kImm28Mask; - DCHECK((imm28 & 3) == 0); - - instr &= ~kImm26Mask; - uint32_t imm26 = imm28 >> 2; - DCHECK(is_uint26(imm26)); - - instr_at_put(pos, instr | (imm26 & kImm26Mask)); + UNREACHABLE(); } } @@ -2596,7 +2579,6 @@ int Assembler::RelocateInternalReference(RelocInfo::Mode rmode, byte* pc, } Instr instr = instr_at(pc); DCHECK(RelocInfo::IsInternalReferenceEncoded(rmode)); - DCHECK(IsJ(instr) || IsLui(instr)); if (IsLui(instr)) { Instr instr_lui = instr_at(pc + 0 * Assembler::kInstrSize); Instr instr_ori = instr_at(pc + 1 * Assembler::kInstrSize); @@ -2628,21 +2610,8 @@ int Assembler::RelocateInternalReference(RelocInfo::Mode rmode, byte* pc, instr_ori2 | (imm & kImm16Mask)); return 4; // Number of instructions patched. } else { - uint32_t imm28 = (instr & static_cast(kImm26Mask)) << 2; - if (static_cast(imm28) == kEndOfJumpChain) { - return 0; // Number of instructions patched. - } - - imm28 += pc_delta; - imm28 &= kImm28Mask; - DCHECK((imm28 & 3) == 0); - - instr &= ~kImm26Mask; - uint32_t imm26 = imm28 >> 2; - DCHECK(is_uint26(imm26)); - - instr_at_put(pc, instr | (imm26 & kImm26Mask)); - return 1; // Number of instructions patched. + UNREACHABLE(); + return 0; // Number of instructions patched. } } @@ -2916,40 +2885,6 @@ void Assembler::set_target_address_at(Address pc, } -void Assembler::JumpLabelToJumpRegister(Address pc) { - // Address pc points to lui/ori instructions. - // Jump to label may follow at pc + 2 * kInstrSize. - uint32_t* p = reinterpret_cast(pc); -#ifdef DEBUG - Instr instr1 = instr_at(pc); -#endif - Instr instr2 = instr_at(pc + 1 * kInstrSize); - Instr instr3 = instr_at(pc + 6 * kInstrSize); - bool patched = false; - - if (IsJal(instr3)) { - DCHECK(GetOpcodeField(instr1) == LUI); - DCHECK(GetOpcodeField(instr2) == ORI); - - uint32_t rs_field = GetRt(instr2) << kRsShift; - uint32_t rd_field = ra.code() << kRdShift; // Return-address (ra) reg. - *(p+6) = SPECIAL | rs_field | rd_field | JALR; - patched = true; - } else if (IsJ(instr3)) { - DCHECK(GetOpcodeField(instr1) == LUI); - DCHECK(GetOpcodeField(instr2) == ORI); - - uint32_t rs_field = GetRt(instr2) << kRsShift; - *(p+6) = SPECIAL | rs_field | JR; - patched = true; - } - - if (patched) { - CpuFeatures::FlushICache(pc+6, sizeof(int32_t)); - } -} - - Handle Assembler::NewConstantPool(Isolate* isolate) { // No out-of-line constant pool support. DCHECK(!FLAG_enable_ool_constant_pool); diff --git a/src/mips64/assembler-mips64.h b/src/mips64/assembler-mips64.h index 1859efdf9..9c659ab0f 100644 --- a/src/mips64/assembler-mips64.h +++ b/src/mips64/assembler-mips64.h @@ -524,8 +524,6 @@ class Assembler : public AssemblerBase { // Return the code target address of the patch debug break slot inline static Address break_address_from_return_address(Address pc); - static void JumpLabelToJumpRegister(Address pc); - static void QuietNaN(HeapObject* nan); // This sets the branch destination (which gets loaded at the call address). diff --git a/src/mips64/macro-assembler-mips64.cc b/src/mips64/macro-assembler-mips64.cc index cfbfbe308..caa21cabe 100644 --- a/src/mips64/macro-assembler-mips64.cc +++ b/src/mips64/macro-assembler-mips64.cc @@ -3107,24 +3107,6 @@ void MacroAssembler::Ret(Condition cond, } -void MacroAssembler::J(Label* L, BranchDelaySlot bdslot) { - BlockTrampolinePoolScope block_trampoline_pool(this); - - uint64_t imm28; - imm28 = jump_address(L); - imm28 &= kImm28Mask; - { BlockGrowBufferScope block_buf_growth(this); - // Buffer growth (and relocation) must be blocked for internal references - // until associated instructions are emitted and available to be patched. - RecordRelocInfo(RelocInfo::INTERNAL_REFERENCE_ENCODED); - j(imm28); - } - // Emit a nop in the branch delay slot if required. - if (bdslot == PROTECT) - nop(); -} - - void MacroAssembler::Jr(Label* L, BranchDelaySlot bdslot) { BlockTrampolinePoolScope block_trampoline_pool(this); diff --git a/src/mips64/macro-assembler-mips64.h b/src/mips64/macro-assembler-mips64.h index e169e0c23..fb16f5b08 100644 --- a/src/mips64/macro-assembler-mips64.h +++ b/src/mips64/macro-assembler-mips64.h @@ -1702,7 +1702,6 @@ const Operand& rt = Operand(zero_reg), BranchDelaySlot bd = PROTECT void BranchAndLinkShort(Label* L, Condition cond, Register rs, const Operand& rt, BranchDelaySlot bdslot = PROTECT); - void J(Label* L, BranchDelaySlot bdslot); void Jr(Label* L, BranchDelaySlot bdslot); void Jalr(Label* L, BranchDelaySlot bdslot); -- 2.34.1