From 0ea589ec69ff2872bef738d2a14890531c7f90f2 Mon Sep 17 00:00:00 2001 From: Qiang Yu Date: Fri, 9 Dec 2022 10:32:48 +0800 Subject: [PATCH] ac/llvm,radv,radeonsi: pass instruction to intrinsic_load abi MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit For simple intrinsic which also need other fields to translate to LLVM like stream_id. Reviewed-by: Rhys Perry Reviewed-by: Marek Olšák Signed-off-by: Qiang Yu Part-of: --- src/amd/llvm/ac_nir_to_llvm.c | 2 +- src/amd/llvm/ac_shader_abi.h | 2 +- src/amd/vulkan/radv_nir_to_llvm.c | 6 +++--- src/gallium/drivers/radeonsi/si_shader_llvm.c | 4 ++-- 4 files changed, 7 insertions(+), 7 deletions(-) diff --git a/src/amd/llvm/ac_nir_to_llvm.c b/src/amd/llvm/ac_nir_to_llvm.c index 58f12a1..7e89d45 100644 --- a/src/amd/llvm/ac_nir_to_llvm.c +++ b/src/amd/llvm/ac_nir_to_llvm.c @@ -3619,7 +3619,7 @@ static bool visit_intrinsic(struct ac_nir_context *ctx, nir_intrinsic_instr *ins case nir_intrinsic_load_ring_gsvs_amd: case nir_intrinsic_load_lds_ngg_scratch_base_amd: case nir_intrinsic_load_lds_ngg_gs_out_vertex_base_amd: - result = ctx->abi->intrinsic_load(ctx->abi, instr->intrinsic); + result = ctx->abi->intrinsic_load(ctx->abi, instr); break; case nir_intrinsic_load_merged_wave_info_amd: result = ac_get_arg(&ctx->ac, ctx->args->merged_wave_info); diff --git a/src/amd/llvm/ac_shader_abi.h b/src/amd/llvm/ac_shader_abi.h index 83aadfb..67eb2af 100644 --- a/src/amd/llvm/ac_shader_abi.h +++ b/src/amd/llvm/ac_shader_abi.h @@ -109,7 +109,7 @@ struct ac_shader_abi { LLVMValueRef (*emit_fbfetch)(struct ac_shader_abi *abi); - LLVMValueRef (*intrinsic_load)(struct ac_shader_abi *abi, nir_intrinsic_op op); + LLVMValueRef (*intrinsic_load)(struct ac_shader_abi *abi, nir_intrinsic_instr *intrin); /* Whether to clamp the shadow reference value to [0,1]on GFX8. Radeonsi currently * uses it due to promoting D16 to D32, but radv needs it off. */ diff --git a/src/amd/vulkan/radv_nir_to_llvm.c b/src/amd/vulkan/radv_nir_to_llvm.c index ec608fd..6f5f0a3 100644 --- a/src/amd/vulkan/radv_nir_to_llvm.c +++ b/src/amd/vulkan/radv_nir_to_llvm.c @@ -1206,14 +1206,14 @@ declare_esgs_ring(struct radv_shader_context *ctx) LLVMSetAlignment(ctx->esgs_ring, 64 * 1024); } -static LLVMValueRef radv_intrinsic_load(struct ac_shader_abi *abi, nir_intrinsic_op op) +static LLVMValueRef radv_intrinsic_load(struct ac_shader_abi *abi, nir_intrinsic_instr *intrin) { struct radv_shader_context *ctx = radv_shader_context_from_abi(abi); - switch (op) { + switch (intrin->intrinsic) { case nir_intrinsic_load_base_vertex: case nir_intrinsic_load_first_vertex: - return radv_load_base_vertex(abi, op == nir_intrinsic_load_base_vertex); + return radv_load_base_vertex(abi, intrin->intrinsic == nir_intrinsic_load_base_vertex); case nir_intrinsic_load_ring_tess_factors_amd: return ctx->hs_ring_tess_factor; case nir_intrinsic_load_ring_tess_offchip_amd: diff --git a/src/gallium/drivers/radeonsi/si_shader_llvm.c b/src/gallium/drivers/radeonsi/si_shader_llvm.c index 6605495..77e1df2 100644 --- a/src/gallium/drivers/radeonsi/si_shader_llvm.c +++ b/src/gallium/drivers/radeonsi/si_shader_llvm.c @@ -699,11 +699,11 @@ void si_build_wrapper_function(struct si_shader_context *ctx, struct ac_llvm_poi LLVMBuildRet(builder, ret); } -static LLVMValueRef si_llvm_load_intrinsic(struct ac_shader_abi *abi, nir_intrinsic_op op) +static LLVMValueRef si_llvm_load_intrinsic(struct ac_shader_abi *abi, nir_intrinsic_instr *intrin) { struct si_shader_context *ctx = si_shader_context_from_abi(abi); - switch (op) { + switch (intrin->intrinsic) { case nir_intrinsic_load_ring_tess_offchip_amd: return ctx->tess_offchip_ring; -- 2.7.4