From 0e760677f4e64f9700e83cb247eeab452cd0379a Mon Sep 17 00:00:00 2001
From: rsandifo <rsandifo@138bc75d-0d04-0410-961f-82ee72b054a4>
Date: Thu, 24 Oct 2002 08:51:00 +0000
Subject: [PATCH] 	* config.gcc (mips64vr-*-elf*, mips64vrel-*-elf*): Add
 	MIPS_MARCH_CONTROLS_SOFT_FLOAT=1 to $tm_defines. 	*
 config/mips/mips.c (MIPS_MARCH_CONTROLS_SOFT_FLOAT): Default to 0. 
 (override_options): Base default setting of MASK_SOFT_FLOAT on -march 	if
 MIPS_MARCH_CONTROLS_SOFT_FLOAT.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@58488 138bc75d-0d04-0410-961f-82ee72b054a4
---
 gcc/ChangeLog          |  8 ++++++++
 gcc/config.gcc         |  2 +-
 gcc/config/mips/mips.c | 23 +++++++++++++++++++++++
 3 files changed, 32 insertions(+), 1 deletion(-)

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 87dd52d..e485a49 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,5 +1,13 @@
 2002-10-24  Richard Sandiford  <rsandifo@redhat.com>
 
+	* config.gcc (mips64vr-*-elf*, mips64vrel-*-elf*): Add
+	MIPS_MARCH_CONTROLS_SOFT_FLOAT=1 to $tm_defines.
+	* config/mips/mips.c (MIPS_MARCH_CONTROLS_SOFT_FLOAT): Default to 0.
+	(override_options): Base default setting of MASK_SOFT_FLOAT on -march
+	if MIPS_MARCH_CONTROLS_SOFT_FLOAT.
+
+2002-10-24  Richard Sandiford  <rsandifo@redhat.com>
+
 	* optabs.c (expand_binop): Don't reuse the shift target in the
 	middle of shift sequences.
 
diff --git a/gcc/config.gcc b/gcc/config.gcc
index ba19f91..bf94659 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -1859,7 +1859,7 @@ mips64-*-elf* | mips64el-*-elf*)
 	;;
 mips64vr-*-elf* | mips64vrel-*-elf*)
         tm_file="mips/vr.h ${tm_file} mips/elf64.h"
-        tm_defines="MIPS_ABI_DEFAULT=ABI_O64"
+        tm_defines="MIPS_ABI_DEFAULT=ABI_O64 MIPS_MARCH_CONTROLS_SOFT_FLOAT=1"
         tmake_file=mips/t-vr
         ;;
 mips64orion-*-elf* | mips64orionel-*-elf*)
diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c
index 07cc657..dafa920 100644
--- a/gcc/config/mips/mips.c
+++ b/gcc/config/mips/mips.c
@@ -626,6 +626,11 @@ const struct mips_cpu_info mips_cpu_info_table[] = {
   { 0, 0, 0 }
 };
 
+/* Nonzero if -march should decide the default value of MASK_SOFT_FLOAT.  */
+#ifndef MIPS_MARCH_CONTROLS_SOFT_FLOAT
+#define MIPS_MARCH_CONTROLS_SOFT_FLOAT 0
+#endif
+
 /* Initialize the GCC target structure.  */
 #undef TARGET_ASM_ALIGNED_HI_OP
 #define TARGET_ASM_ALIGNED_HI_OP "\t.half\t"
@@ -5220,6 +5225,24 @@ override_options ()
 	target_flags &= ~MASK_LONG64;
     }
 
+  if (MIPS_MARCH_CONTROLS_SOFT_FLOAT
+      && (target_flags_explicit & MASK_SOFT_FLOAT) == 0)
+    {
+      /* For some configurations, it is useful to have -march control
+	 the default setting of MASK_SOFT_FLOAT.  */
+      switch ((int) mips_arch)
+	{
+	case PROCESSOR_R4100:
+	case PROCESSOR_R4120:
+	  target_flags |= MASK_SOFT_FLOAT;
+	  break;
+
+	default:
+	  target_flags &= ~MASK_SOFT_FLOAT;
+	  break;
+	}
+    }
+
   if (mips_abi != ABI_32 && mips_abi != ABI_O64)
     flag_pcc_struct_return = 0;
 
-- 
2.7.4