From 0e0c18f60af51f3afd210a2929b853dd02abe996 Mon Sep 17 00:00:00 2001 From: Tamar Christina Date: Tue, 14 Mar 2023 10:25:42 +0000 Subject: [PATCH] testsuite: move mla_1 test to aarch64 only [PR109118] I previously made the test generic, but there's no list of targets that support integer MLA, and so it's not really feasible for me to make this generic. As such I've moved it to be AArch64 only. gcc/testsuite/ChangeLog: PR testsuite/109118 * gcc.dg/mla_1.c: Moved to... * gcc.target/aarch64/sve/mla_3.c: ...here. --- gcc/testsuite/{gcc.dg/mla_1.c => gcc.target/aarch64/sve/mla_3.c} | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) rename gcc/testsuite/{gcc.dg/mla_1.c => gcc.target/aarch64/sve/mla_3.c} (78%) diff --git a/gcc/testsuite/gcc.dg/mla_1.c b/gcc/testsuite/gcc.target/aarch64/sve/mla_3.c similarity index 78% rename from gcc/testsuite/gcc.dg/mla_1.c rename to gcc/testsuite/gcc.target/aarch64/sve/mla_3.c index 98e5808..25e99f7 100644 --- a/gcc/testsuite/gcc.dg/mla_1.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/mla_3.c @@ -1,6 +1,5 @@ /* { dg-do compile } */ -/* { dg-require-effective-target vect_int } */ -/* { dg-options "-O2 -msve-vector-bits=256 -march=armv8.2-a+sve -fdump-tree-optimized" { target aarch64*-*-* } } */ +/* { dg-options "-O2 -msve-vector-bits=256 -march=armv8.2-a+sve -fdump-tree-optimized" } */ unsigned int f1 (unsigned int a, unsigned int b, unsigned int c) { @@ -37,4 +36,4 @@ g3 (vec a, vec b, vec c) return a * b + c; } -/* { dg-final { scan-tree-dump-times {\.FMA } 1 "optimized" { target aarch64*-*-* } } } */ +/* { dg-final { scan-tree-dump-times {\.FMA } 1 "optimized" } } */ -- 2.7.4