From 0e06f76a848a5f556a40933791ffe2a9c0d4e979 Mon Sep 17 00:00:00 2001 From: Ben Widawsky Date: Tue, 26 Jan 2016 15:44:01 -0800 Subject: [PATCH] i965/skl: Utilize new 5th bit for gateway messages Modify comment as spotted by Matt, and Chris Forbes Signed-off-by: Ben Widawsky Reviewed-by: Matt Turner Reviewed-by: Jordan Justen --- src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp index aad512f..a74ed72 100644 --- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp @@ -924,6 +924,8 @@ void fs_visitor::emit_barrier() { assert(devinfo->gen >= 7); + const uint32_t barrier_id_mask = + devinfo->gen >= 9 ? 0x8f000000u : 0x0f000000u; /* We are getting the barrier ID from the compute shader header */ assert(stage == MESA_SHADER_COMPUTE); @@ -935,9 +937,9 @@ fs_visitor::emit_barrier() /* Clear the message payload */ pbld.MOV(payload, brw_imm_ud(0u)); - /* Copy bits 27:24 of r0.2 (barrier id) to the message payload reg.2 */ + /* Copy the barrier id from r0.2 to the message payload reg.2 */ fs_reg r0_2 = fs_reg(retype(brw_vec1_grf(0, 2), BRW_REGISTER_TYPE_UD)); - pbld.AND(component(payload, 2), r0_2, brw_imm_ud(0x0f000000u)); + pbld.AND(component(payload, 2), r0_2, brw_imm_ud(barrier_id_mask)); /* Emit a gateway "barrier" message using the payload we set up, followed * by a wait instruction. -- 2.7.4