From 0d6cdf825b25f05bf2728518a399a052e803e62b Mon Sep 17 00:00:00 2001 From: "palfia@homejinni.com" Date: Tue, 10 Dec 2013 23:03:56 +0000 Subject: [PATCH] MIPS: Fix popping order on ARM. Port r18291 (f5a50cf3) BUG= R=gergely@homejinni.com Review URL: https://codereview.chromium.org/111933004 git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@18295 ce2b1a6d-e550-0410-aec6-3dcde31c8c00 --- src/mips/stub-cache-mips.cc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mips/stub-cache-mips.cc b/src/mips/stub-cache-mips.cc index 8e379f7..0b84e5a 100644 --- a/src/mips/stub-cache-mips.cc +++ b/src/mips/stub-cache-mips.cc @@ -1082,9 +1082,9 @@ class CallInterceptorCompiler BASE_EMBEDDED { CompileCallLoadPropertyWithInterceptor( masm, receiver, holder, name_, holder_obj, IC::kLoadPropertyWithInterceptorOnly); - __ pop(receiver); __ pop(name_); __ pop(holder); + __ pop(receiver); } // If interceptor returns no-result sentinel, call the constant function. __ LoadRoot(scratch, Heap::kNoInterceptorResultSentinelRootIndex); -- 2.7.4