From 0d58dcc3cff2f491f7c57c5c5c9d4b28e7f842b2 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Nicolai=20H=C3=A4hnle?= Date: Fri, 21 Sep 2018 18:05:19 +0200 Subject: [PATCH] radeonsi: don't set RAW_WAIT for CP DMA clears MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit There is never a read-after-write hazard because the command doesn't read. Reviewed-by: Marek Olšák --- src/gallium/drivers/radeonsi/si_cp_dma.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/gallium/drivers/radeonsi/si_cp_dma.c b/src/gallium/drivers/radeonsi/si_cp_dma.c index 33220d9..80673f3 100644 --- a/src/gallium/drivers/radeonsi/si_cp_dma.c +++ b/src/gallium/drivers/radeonsi/si_cp_dma.c @@ -189,7 +189,8 @@ static void si_cp_dma_prepare(struct si_context *sctx, struct pipe_resource *dst if (!(user_flags & SI_CPDMA_SKIP_GFX_SYNC) && sctx->flags) si_emit_cache_flush(sctx); - if (!(user_flags & SI_CPDMA_SKIP_SYNC_BEFORE) && *is_first) + if (!(user_flags & SI_CPDMA_SKIP_SYNC_BEFORE) && *is_first && + !(*packet_flags & CP_DMA_CLEAR)) *packet_flags |= CP_DMA_RAW_WAIT; *is_first = false; -- 2.7.4