From 0d37e2d3ead072ba57e03fcb97a041504a22e721 Mon Sep 17 00:00:00 2001
From: Vladimir Makarov <vmakarov@redhat.com>
Date: Fri, 26 Mar 2021 17:09:24 +0000
Subject: [PATCH] [PR99766] Consider relaxed memory associated more with memory
 instead of special memory.

Relaxed memory should be considered more like memory then special memory.

gcc/ChangeLog:

	PR target/99766
	* ira-costs.c (record_reg_classes): Put case with
	CT_RELAXED_MEMORY adjacent to one with CT_MEMORY.
	* ira.c (ira_setup_alts): Ditto.
	* lra-constraints.c (process_alt_operands): Ditto.
	* recog.c (asm_operand_ok): Ditto.
	* reload.c (find_reloads): Ditto.

gcc/testsuite/ChangeLog:

	PR target/99766
	* g++.target/aarch64/sve/pr99766.C: New.
---
 gcc/ira-costs.c                                |  2 +-
 gcc/ira.c                                      |  2 +-
 gcc/lra-constraints.c                          |  2 +-
 gcc/recog.c                                    |  2 +-
 gcc/reload.c                                   |  2 +-
 gcc/testsuite/g++.target/aarch64/sve/pr99766.C | 24 ++++++++++++++++++++++++
 6 files changed, 29 insertions(+), 5 deletions(-)
 create mode 100644 gcc/testsuite/g++.target/aarch64/sve/pr99766.C

diff --git a/gcc/ira-costs.c b/gcc/ira-costs.c
index 7547f3e..10727b5 100644
--- a/gcc/ira-costs.c
+++ b/gcc/ira-costs.c
@@ -773,6 +773,7 @@ record_reg_classes (int n_alts, int n_ops, rtx *ops,
 		      break;
 
 		    case CT_MEMORY:
+		    case CT_RELAXED_MEMORY:
 		      /* Every MEM can be reloaded to fit.  */
 		      insn_allows_mem[i] = allows_mem[i] = 1;
 		      if (MEM_P (op))
@@ -780,7 +781,6 @@ record_reg_classes (int n_alts, int n_ops, rtx *ops,
 		      break;
 
 		    case CT_SPECIAL_MEMORY:
-		    case CT_RELAXED_MEMORY:
 		      insn_allows_mem[i] = allows_mem[i] = 1;
 		      if (MEM_P (extract_mem_from_operand (op))
 			  && constraint_satisfied_p (op, cn))
diff --git a/gcc/ira.c b/gcc/ira.c
index 7e90328..b93588d 100644
--- a/gcc/ira.c
+++ b/gcc/ira.c
@@ -1871,10 +1871,10 @@ ira_setup_alts (rtx_insn *insn)
 			  goto op_success;
 
 			case CT_MEMORY:
+			case CT_RELAXED_MEMORY:
 			  mem = op;
 			  /* Fall through.  */
 			case CT_SPECIAL_MEMORY:
-			case CT_RELAXED_MEMORY:
 			  if (!mem)
 			    mem = extract_mem_from_operand (op);
 			  if (MEM_P (mem))
diff --git a/gcc/lra-constraints.c b/gcc/lra-constraints.c
index 861b5aa..9993065 100644
--- a/gcc/lra-constraints.c
+++ b/gcc/lra-constraints.c
@@ -2417,6 +2417,7 @@ process_alt_operands (int only_alternative)
 		      break;
 
 		    case CT_MEMORY:
+		    case CT_RELAXED_MEMORY:
 		      if (MEM_P (op)
 			  && satisfies_memory_constraint_p (op, cn))
 			win = true;
@@ -2459,7 +2460,6 @@ process_alt_operands (int only_alternative)
 		      break;
 
 		    case CT_SPECIAL_MEMORY:
-		    case CT_RELAXED_MEMORY:
 		      if (satisfies_memory_constraint_p (op, cn))
 			win = true;
 		      else if (spilled_pseudo_p (op))
diff --git a/gcc/recog.c b/gcc/recog.c
index ee143bc..eb617f1 100644
--- a/gcc/recog.c
+++ b/gcc/recog.c
@@ -2267,10 +2267,10 @@ asm_operand_ok (rtx op, const char *constraint, const char **constraints)
 	      break;
 
 	    case CT_MEMORY:
+	    case CT_RELAXED_MEMORY:
 	      mem = op;
 	      /* Fall through.  */
 	    case CT_SPECIAL_MEMORY:
-	    case CT_RELAXED_MEMORY:
 	      /* Every memory operand can be reloaded to fit.  */
 	      if (!mem)
 		mem = extract_mem_from_operand (op);
diff --git a/gcc/reload.c b/gcc/reload.c
index 7340125..461fd02 100644
--- a/gcc/reload.c
+++ b/gcc/reload.c
@@ -3471,6 +3471,7 @@ find_reloads (rtx_insn *insn, int replace, int ind_levels, int live_known,
 			break;
 
 		      case CT_MEMORY:
+		      case CT_RELAXED_MEMORY:
 			if (force_reload)
 			  break;
 			if (constraint_satisfied_p (operand, cn))
@@ -3504,7 +3505,6 @@ find_reloads (rtx_insn *insn, int replace, int ind_levels, int live_known,
 			break;
 
 		      case CT_SPECIAL_MEMORY:
-		      case CT_RELAXED_MEMORY:
 			if (force_reload)
 			  break;
 			if (constraint_satisfied_p (operand, cn))
diff --git a/gcc/testsuite/g++.target/aarch64/sve/pr99766.C b/gcc/testsuite/g++.target/aarch64/sve/pr99766.C
new file mode 100644
index 0000000..0ca8aee
--- /dev/null
+++ b/gcc/testsuite/g++.target/aarch64/sve/pr99766.C
@@ -0,0 +1,24 @@
+/* { dg-do compile } */
+/* { dg-additional-options "-O3 -march=armv8.2-a+sve" } */
+typedef float a __attribute__((__mode__(HF)));
+typedef struct {
+  a b;
+  a c;
+} d;
+int e;
+d *f, *g;
+__fp16 h;
+void j() {
+  for (int i;; ++i) {
+    auto l = &f[i];
+    for (int k; k < e;) {
+      k = 0;
+      for (; k < e; ++k)
+        g[k].b = l[k].b * l[k].c;
+    }
+    for (int k; k < e; ++k) {
+      g[k].b *= h;
+      g[k].c *= h;
+    }
+  }
+}
-- 
2.7.4