From 0cf915809ce775cba3f08de5df1fb89bdbd95a28 Mon Sep 17 00:00:00 2001 From: Sonic Zhang Date: Tue, 3 Sep 2013 13:55:07 +0800 Subject: [PATCH] driver:stmmac: Adjust time stamp increase for 0.465 ns accurate only when Time stamp binary rollover is set. The synopsys spec says When TSCRLSSR is cleard, the rollover value of sub-second register is 0x7FFFFFFF(0.465 ns per clock). Signed-off-by: Sonic Zhang Signed-off-by: David S. Miller --- drivers/net/ethernet/stmicro/stmmac/stmmac_hwtstamp.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_hwtstamp.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_hwtstamp.c index def7e75..76ad214 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_hwtstamp.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_hwtstamp.c @@ -45,8 +45,8 @@ static void stmmac_config_sub_second_increment(void __iomem *ioaddr) data = (1000000000ULL / 50000000); /* 0.465ns accuracy */ - if (value & PTP_TCR_TSCTRLSSR) - data = (data * 100) / 465; + if (!(value & PTP_TCR_TSCTRLSSR)) + data = (data * 1000) / 465; writel(data, ioaddr + PTP_SSIR); } -- 2.7.4