From 0cb14750e7723c50011c6c9c73dca6e8608486e5 Mon Sep 17 00:00:00 2001 From: "Maciej W. Rozycki" Date: Tue, 27 Sep 2016 15:08:51 +0000 Subject: [PATCH] MIPS/GCC/doc: Fix `d' constraint description Revert a part of the `d' constraint documentation update made with commit 111868 ("Use define_constraint for MIPS"), , , which inadvertently made the registers covered to be referred to as "address" rather than "general-purpose" registers, and then further clarify the set of registers allowed with MIPS16 code. * config/mips/constraints.md (d): Fix documentation. * doc/md.texi (Machine Constraints): Update accordingly. From-SVN: r240546 --- gcc/ChangeLog | 5 +++++ gcc/config/mips/constraints.md | 4 ++-- gcc/doc/md.texi | 4 ++-- 3 files changed, 9 insertions(+), 4 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 670e941..fb011a1 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2016-09-27 Maciej W. Rozycki + + * config/mips/constraints.md (d): Fix documentation. + * doc/md.texi (Machine Constraints): Update accordingly. + 2016-09-27 Richard Biener * dwarf2out.c (dwarf2out_init): Move text_section_line_info, diff --git a/gcc/config/mips/constraints.md b/gcc/config/mips/constraints.md index 56b363e..4b5619f 100644 --- a/gcc/config/mips/constraints.md +++ b/gcc/config/mips/constraints.md @@ -20,8 +20,8 @@ ;; Register constraints (define_register_constraint "d" "TARGET_MIPS16 ? M16_REGS : GR_REGS" - "An address register. This is equivalent to @code{r} unless - generating MIPS16 code.") + "A general-purpose register. This is equivalent to @code{r} unless + generating MIPS16 code, in which case the MIPS16 register set is used.") (define_register_constraint "t" "T_REG" "@internal") diff --git a/gcc/doc/md.texi b/gcc/doc/md.texi index c1015f0..201f0a5 100644 --- a/gcc/doc/md.texi +++ b/gcc/doc/md.texi @@ -2582,8 +2582,8 @@ A status register (@code{rmsr}, @code{$fcc1} to @code{$fcc7}). @item MIPS---@file{config/mips/constraints.md} @table @code @item d -An address register. This is equivalent to @code{r} unless -generating MIPS16 code. +A general-purpose register. This is equivalent to @code{r} unless +generating MIPS16 code, in which case the MIPS16 register set is used. @item f A floating-point register (if available). -- 2.7.4