From 0bf0dbac6e182b27379502f06c07d2ac53cd73e1 Mon Sep 17 00:00:00 2001 From: rsandifo Date: Tue, 5 Nov 2002 12:41:52 +0000 Subject: [PATCH] * config/mips/mips.h (CANNOT_CHANGE_MODE_CLASS): Move comment to... * config/mips/mips.c (mips_cannot_change_mode_class): ...here. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@58821 138bc75d-0d04-0410-961f-82ee72b054a4 --- gcc/ChangeLog | 5 +++++ gcc/config/mips/mips.c | 17 ++++++++++++++++- gcc/config/mips/mips.h | 17 ----------------- 3 files changed, 21 insertions(+), 18 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 0b4cc8e..ff854be 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2002-11-05 Richard Sandiford + + * config/mips/mips.h (CANNOT_CHANGE_MODE_CLASS): Move comment to... + * config/mips/mips.c (mips_cannot_change_mode_class): ...here. + 2002-11-04 Dale Johannesen * doloop.c (doloop_modify_runtime): Fix loop count computation diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c index d58afff..fa326ab 100644 --- a/gcc/config/mips/mips.c +++ b/gcc/config/mips/mips.c @@ -8400,7 +8400,22 @@ function_arg_pass_by_reference (cum, mode, type, named) } /* Return the class of registers for which a mode change from FROM to TO - is invalid. */ + is invalid. + + In little-endian mode, the hi-lo registers are numbered backwards, + so (subreg:SI (reg:DI hi) 0) gets the high word instead of the low + word as intended. + + Similarly, when using paired floating-point registers, the first + register holds the low word, regardless of endianness. So in big + endian mode, (subreg:SI (reg:DF $f0) 0) does not get the high word + as intended. + + Also, loading a 32-bit value into a 64-bit floating-point register + will not sign-extend the value, despite what LOAD_EXTEND_OP says. + We can't allow 64-bit float registers to change from a 32-bit + mode to a 64-bit mode. */ + enum reg_class mips_cannot_change_mode_class (from, to) enum machine_mode from, to; diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h index bc37a14..3b784c8 100644 --- a/gcc/config/mips/mips.h +++ b/gcc/config/mips/mips.h @@ -2326,23 +2326,6 @@ extern enum reg_class mips_char_to_class[256]; #define CLASS_MAX_NREGS(CLASS, MODE) mips_class_max_nregs (CLASS, MODE) -/* If defined, gives a class of registers that cannot be used as the - operand of a SUBREG that changes the mode of the object illegally. - - In little-endian mode, the hi-lo registers are numbered backwards, - so (subreg:SI (reg:DI hi) 0) gets the high word instead of the low - word as intended. - - Similarly, when using paired floating-point registers, the first - register holds the low word, regardless of endianness. So in big - endian mode, (subreg:SI (reg:DF $f0) 0) does not get the high word - as intended. - - Also, loading a 32-bit value into a 64-bit floating-point register - will not sign-extend the value, despite what LOAD_EXTEND_OP says. - We can't allow 64-bit float registers to change from a 32-bit - mode to a 64-bit mode. */ - #define CANNOT_CHANGE_MODE_CLASS(FROM, TO) \ mips_cannot_change_mode_class (FROM, TO) -- 2.7.4