From 0a7f81a4518ef88d897322985483c2dd48fa577e Mon Sep 17 00:00:00 2001 From: Nicolas Vasilache Date: Tue, 12 Oct 2021 12:56:40 +0000 Subject: [PATCH] mlir][Vector] Fix spuriously disabled test. --- mlir/test/Conversion/VectorToSCF/vector-to-scf.mlir | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/mlir/test/Conversion/VectorToSCF/vector-to-scf.mlir b/mlir/test/Conversion/VectorToSCF/vector-to-scf.mlir index dd5cf13..f85d27a 100644 --- a/mlir/test/Conversion/VectorToSCF/vector-to-scf.mlir +++ b/mlir/test/Conversion/VectorToSCF/vector-to-scf.mlir @@ -15,10 +15,10 @@ func @vector_transfer_ops_0d(%M: memref) { %0 = vector.transfer_read %M[], %f0 {permutation_map = affine_map<()->(0)>} : memref, vector<1xf32> -// C-HECK: scf.for %[[J:.*]] = %{{.*}} -// C-HECK: %[[JDX:.*]] = index_cast %[[J]] : index to i32 -// C-HECK: %[[SS:.*]] = vector.extractelement %[[R0]][%[[JDX]] : i32] : vector<1xf32> -// C-HECK: memref.store %[[SS]], %[[MEM]][] : memref +// CHECK: scf.for %[[J:.*]] = %{{.*}} +// CHECK: %[[JDX:.*]] = index_cast %[[J]] : index to i32 +// CHECK: %[[SS:.*]] = vector.extractelement %[[R0]][%[[JDX]] : i32] : vector<1xf32> +// CHECK: memref.store %[[SS]], %[[MEM]][] : memref vector.transfer_write %0, %M[] {permutation_map = affine_map<()->(0)>} : vector<1xf32>, memref -- 2.7.4