From 0a7ada196675717b1c9290aa325f054f300f696b Mon Sep 17 00:00:00 2001 From: Anshuman Gupta Date: Wed, 18 Mar 2020 15:14:48 +0530 Subject: [PATCH] drm/i915: Enable non-contiguous pipe fusing MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit As we have already enabled supported infrastructure for non-contiguous pipe fusing in driver, we don't require non-contiguous pipe_mask check anymore. It is an unlike condition, it make sense to remove this condition. changes since RFC: - using intel_pipe_mask_is_valid() function to check integrity of pipe_mask. [Ville] v2: - simplify condition in intel_pipe_mask_is_valid(). [Ville] v3: - removed non-contiguous pipe fusing check. [Lucas] Cc: Ville Syrjälä Cc: Lucas De Marchi Reviewed-by: Lucas De Marchi Signed-off-by: Anshuman Gupta Signed-off-by: Uma Shankar Link: https://patchwork.freedesktop.org/patch/msgid/20200318094448.26239-1-anshuman.gupta@intel.com --- drivers/gpu/drm/i915/intel_device_info.c | 12 +----------- 1 file changed, 1 insertion(+), 11 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c index d7fe12734db8..9ff89e142ff1 100644 --- a/drivers/gpu/drm/i915/intel_device_info.c +++ b/drivers/gpu/drm/i915/intel_device_info.c @@ -998,17 +998,7 @@ void intel_device_info_runtime_init(struct drm_i915_private *dev_priv) (dfsm & TGL_DFSM_PIPE_D_DISABLE)) enabled_mask &= ~BIT(PIPE_D); - /* - * At least one pipe should be enabled and if there are - * disabled pipes, they should be the last ones, with no holes - * in the mask. - */ - if (enabled_mask == 0 || !is_power_of_2(enabled_mask + 1)) - drm_err(&dev_priv->drm, - "invalid pipe fuse configuration: enabled_mask=0x%x\n", - enabled_mask); - else - info->pipe_mask = enabled_mask; + info->pipe_mask = enabled_mask; if (dfsm & SKL_DFSM_DISPLAY_HDCP_DISABLE) info->display.has_hdcp = 0; -- 2.34.1