From 0a697d6901e40fd8bb6723189653babf51a8fbc6 Mon Sep 17 00:00:00 2001 From: "Yun(Mark) Tu" Date: Wed, 28 Mar 2012 13:47:56 -0700 Subject: [PATCH] GFX-3D: Add related config to support SGX544 MP2 BZ: 26839 Add DRM_CTP_PR1 into Kconfig, and SGX544MP2's register bar length is 0x10000 Change-Id: I355ca4c08b0cc79877fb1e538c9725f44bbf20ba Signed-off-by: Yun(Mark) Tu Reviewed-on: http://android.intel.com:8080/41511 Reviewed-by: Ponnusamy, Siva Prasath Reviewed-by: Dai, Yu Reviewed-by: Xu, Randy Tested-by: Xu, Randy Reviewed-by: buildbot Tested-by: buildbot --- drivers/staging/mrst/Kconfig | 8 ++++++++ drivers/staging/mrst/pvr/services4/system/intel_drm/sysconfig.h | 6 +++++- 2 files changed, 13 insertions(+), 1 deletion(-) diff --git a/drivers/staging/mrst/Kconfig b/drivers/staging/mrst/Kconfig index 514e7d5..1083644 100644 --- a/drivers/staging/mrst/Kconfig +++ b/drivers/staging/mrst/Kconfig @@ -69,6 +69,14 @@ config DRM_CTP platform. If M is selected the module will be called mid_gfx. +config DRM_CTP_PR1 + tristate "Intel Clover Trail Phone for SGX544MP2(CTP)" + depends on DRM_CTP + help + Choose this option if you have a Clover Trail Phone + platform. If M is selected the module will be called + mid_gfx. + config MDFLD_DSI_DSR bool "Support DSI Fullscreen Display Self Refreshment " depends on (DRM_MDFLD || DRM_CTP) && !MDFLD_DSI_DPU diff --git a/drivers/staging/mrst/pvr/services4/system/intel_drm/sysconfig.h b/drivers/staging/mrst/pvr/services4/system/intel_drm/sysconfig.h index aa26ea5..bf434c7 100755 --- a/drivers/staging/mrst/pvr/services4/system/intel_drm/sysconfig.h +++ b/drivers/staging/mrst/pvr/services4/system/intel_drm/sysconfig.h @@ -41,7 +41,11 @@ #define POULSBO_REG_SIZE 0x2100 #define SGX_REGS_OFFSET 0x80000 -#define SGX_REG_SIZE 0x4000 +#if defined(SGX544) +#define SGX_REG_SIZE 0x10000 +#else +#define SGX_REG_SIZE 0x4000 +#endif #define MRST_SGX_REGS_OFFSET SGX_REGS_OFFSET #define POULSBO_SGX_REGS_OFFSET 0x40000 -- 2.7.4