From 09e59553ecd6d1439593739aeffc7c00186c0f9b Mon Sep 17 00:00:00 2001 From: Leo Liu Date: Mon, 1 May 2023 11:46:15 -0400 Subject: [PATCH] amd: Add vcn ip version info And make it support for kernel w/wo ip_discovery. Signed-off-by: Leo Liu Reviewed-by: Boyuan Zhang Part-of: --- src/amd/common/ac_gpu_info.c | 73 ++++++++++++++++++++++++++++++++++++++++++++ src/amd/common/ac_gpu_info.h | 3 ++ src/amd/common/amd_family.h | 25 +++++++++++++++ 3 files changed, 101 insertions(+) diff --git a/src/amd/common/ac_gpu_info.c b/src/amd/common/ac_gpu_info.c index 728d0d9..0c93dda 100644 --- a/src/amd/common/ac_gpu_info.c +++ b/src/amd/common/ac_gpu_info.c @@ -686,6 +686,7 @@ bool ac_query_gpu_info(int fd, void *dev_p, struct radeon_info *info) if (info->drm_minor >= 48 && ip_info.ip_discovery_version) { info->ip[ip_type].ver_major = (ip_info.ip_discovery_version >> 16) & 0xff; info->ip[ip_type].ver_minor = (ip_info.ip_discovery_version >> 8) & 0xff; + info->ip[ip_type].ver_rev = ip_info.ip_discovery_version & 0xff; } else { info->ip[ip_type].ver_major = ip_info.hw_ip_version_major; info->ip[ip_type].ver_minor = ip_info.hw_ip_version_minor; @@ -903,6 +904,78 @@ bool ac_query_gpu_info(int fd, void *dev_p, struct radeon_info *info) return false; } +#define VCN_IP_VERSION(mj, mn, rv) (((mj) << 16) | ((mn) << 8) | (rv)) + + for (unsigned i = AMD_IP_VCN_DEC; i <= AMD_IP_VCN_JPEG; ++i) { + if (!info->ip[i].num_queues) + continue; + + switch(VCN_IP_VERSION(info->ip[i].ver_major, + info->ip[i].ver_minor, + info->ip[i].ver_rev)) { + case VCN_IP_VERSION(1, 0, 0): + info->vcn_ip_version = VCN_1_0_0; + break; + case VCN_IP_VERSION(1, 0, 1): + info->vcn_ip_version = VCN_1_0_1; + break; + case VCN_IP_VERSION(2, 0, 0): + info->vcn_ip_version = VCN_2_0_0; + break; + case VCN_IP_VERSION(2, 0, 2): + info->vcn_ip_version = VCN_2_0_2; + break; + case VCN_IP_VERSION(2, 0, 3): + info->vcn_ip_version = VCN_2_0_3; + break; + case VCN_IP_VERSION(2, 2, 0): + info->vcn_ip_version = VCN_2_2_0; + break; + case VCN_IP_VERSION(2, 5, 0): + info->vcn_ip_version = VCN_2_5_0; + break; + case VCN_IP_VERSION(2, 6, 0): + info->vcn_ip_version = VCN_2_6_0; + break; + case VCN_IP_VERSION(3, 0, 0): + /* Navi24 version need to be revised if it fallbacks to the older way + * with default version as 3.0.0, since Navi24 has different feature + * sets from other VCN3 family */ + info->vcn_ip_version = (info->family != CHIP_NAVI24) ? VCN_3_0_0 : VCN_3_0_33; + break; + case VCN_IP_VERSION(3, 0, 2): + info->vcn_ip_version = VCN_3_0_2; + break; + case VCN_IP_VERSION(3, 0, 16): + info->vcn_ip_version = VCN_3_0_16; + break; + case VCN_IP_VERSION(3, 0, 33): + info->vcn_ip_version = VCN_3_0_33; + break; + case VCN_IP_VERSION(3, 1, 1): + info->vcn_ip_version = VCN_3_1_1; + break; + case VCN_IP_VERSION(3, 1, 2): + info->vcn_ip_version = VCN_3_1_2; + break; + case VCN_IP_VERSION(4, 0, 0): + info->vcn_ip_version = VCN_4_0_0; + break; + case VCN_IP_VERSION(4, 0, 2): + info->vcn_ip_version = VCN_4_0_2; + break; + case VCN_IP_VERSION(4, 0, 3): + info->vcn_ip_version = VCN_4_0_3; + break; + case VCN_IP_VERSION(4, 0, 4): + info->vcn_ip_version = VCN_4_0_4; + break; + default: + info->vcn_ip_version = VCN_UNKNOWN; + } + break; + } + info->family_id = device_info.family; info->chip_external_rev = device_info.external_rev; info->chip_rev = device_info.chip_rev; diff --git a/src/amd/common/ac_gpu_info.h b/src/amd/common/ac_gpu_info.h index 6a0db6e..1a829f2 100644 --- a/src/amd/common/ac_gpu_info.h +++ b/src/amd/common/ac_gpu_info.h @@ -47,6 +47,7 @@ struct amdgpu_gpu_info; struct amd_ip_info { uint8_t ver_major; uint8_t ver_minor; + uint8_t ver_rev; uint8_t num_queues; }; @@ -203,6 +204,8 @@ struct radeon_info { } codec_info[8]; /* the number of available codecs */ } dec_caps, enc_caps; + enum vcn_version vcn_ip_version; + /* Kernel & winsys capabilities. */ uint32_t drm_major; /* version */ uint32_t drm_minor; diff --git a/src/amd/common/amd_family.h b/src/amd/common/amd_family.h index 532c4ad..03550b3 100644 --- a/src/amd/common/amd_family.h +++ b/src/amd/common/amd_family.h @@ -189,6 +189,31 @@ enum amd_vram_type { AMD_VRAM_TYPE_LPDDR5, }; +enum vcn_version{ + VCN_UNKNOWN, + VCN_1_0_0, + VCN_1_0_1, + + VCN_2_0_0, + VCN_2_0_2, + VCN_2_0_3, + VCN_2_2_0, + VCN_2_5_0, + VCN_2_6_0, + + VCN_3_0_0, + VCN_3_0_2, + VCN_3_0_16, + VCN_3_0_33, + VCN_3_1_1, + VCN_3_1_2, + + VCN_4_0_0, + VCN_4_0_2, + VCN_4_0_3, + VCN_4_0_4, +}; + const char *ac_get_family_name(enum radeon_family family); #ifdef __cplusplus -- 2.7.4