From 0975608ffc827afbc3b65fc2d4ad5676d35278ab Mon Sep 17 00:00:00 2001 From: "curry.zhang" Date: Sat, 23 Apr 2022 20:27:41 -0700 Subject: [PATCH] [DMA] : Add standard system clock tree & reset API Signed-off-by: curry.zhang --- arch/riscv/boot/dts/starfive/jh7110.dtsi | 7 ++++++- drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c | 15 +++++++++++++++ drivers/dma/dw-axi-dmac/dw-axi-dmac.h | 2 ++ 3 files changed, 23 insertions(+), 1 deletion(-) mode change 100644 => 100755 drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c mode change 100644 => 100755 drivers/dma/dw-axi-dmac/dw-axi-dmac.h diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi index 8595cc3..bfe0dd8 100644 --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi @@ -434,8 +434,13 @@ dma: dma-controller@16050000 { compatible = "starfive,axi-dma"; reg = <0x0 0x16050000 0x0 0x10000>; - clocks = <&stg_axiahb_clk>, <&stg_apbclk>; + clocks = <&clkgen JH7110_DMA1P_CLK_AXI>, + <&clkgen JH7110_DMA1P_CLK_AHB>; clock-names = "core-clk", "cfgr-clk"; + resets = <&rstgen RSTN_U0_DW_DMA1P_AXI>, + <&rstgen RSTN_U0_DW_DMA1P_AHB>; + reset-names = "rst_axi", + "rst_ahb"; interrupts = <73>; #dma-cells = <2>; dma-channels = <4>; diff --git a/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c b/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c old mode 100644 new mode 100755 index 9e9953e..4029bb5 --- a/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c +++ b/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c @@ -27,6 +27,7 @@ #include #include #include +#include #include "dw-axi-dmac.h" #include "../dmaengine.h" @@ -1492,6 +1493,20 @@ static int dw_probe(struct platform_device *pdev) if (IS_ERR(chip->cfgr_clk)) return PTR_ERR(chip->cfgr_clk); + chip->rst_core = devm_reset_control_get_exclusive(&pdev->dev, "rst_axi"); + if (IS_ERR(chip->rst_core)) { + dev_err(&pdev->dev, "%s: failed to get rst_core reset control\n", __func__); + return PTR_ERR(chip->rst_core); + } + chip->rst_cfgr = devm_reset_control_get_exclusive(&pdev->dev, "rst_ahb"); + if (IS_ERR(chip->rst_cfgr)) { + dev_err(&pdev->dev, "%s: failed to get rst_cfgr reset control\n", __func__); + return PTR_ERR(chip->rst_cfgr); + } + + reset_control_deassert(chip->rst_core); + reset_control_deassert(chip->rst_cfgr); + ret = parse_device_properties(chip); if (ret) return ret; diff --git a/drivers/dma/dw-axi-dmac/dw-axi-dmac.h b/drivers/dma/dw-axi-dmac/dw-axi-dmac.h old mode 100644 new mode 100755 index 7ba95ee..2bc9ecf --- a/drivers/dma/dw-axi-dmac/dw-axi-dmac.h +++ b/drivers/dma/dw-axi-dmac/dw-axi-dmac.h @@ -100,6 +100,8 @@ struct axi_dma_chip { struct clk *cfgr_clk; struct dw_axi_dma *dw; struct dma_multi multi; + struct reset_control *rst_core; + struct reset_control *rst_cfgr; }; /* LLI == Linked List Item */ -- 2.7.4