From 0952813b0b27abe7f53a8048c0218883412e54cd Mon Sep 17 00:00:00 2001 From: DJ Delorie Date: Thu, 30 Apr 2015 15:25:49 -0400 Subject: [PATCH] Make RL78 disassembler and simulator respect ISA for mul/div [gas] * config/rl78-defs.h (rl78_isa_g10): New. (rl78_isa_g13): New. (rl78_isa_g14): New. * config/rl78-parse.y (ISA_G10): New. (ISA_G13): New. (ISA_G14): New. (MULHU, MULH, MULU, DIVHU, DIVWU, MACHU, MACH): Use them. * config/tc-rl78.c (rl78_isa_g10): New. (rl78_isa_g13): New. (rl78_isa_g14): New. [gdb] * rl78-tdep.c (rl78_analyze_prologue): Pass RL78_ISA_DEFAULT to rl78_decode_opcode [include] * dis-asm.h (print_insn_rl78_g10): New. (print_insn_rl78_g13): New. (print_insn_rl78_g14): New. (rl78_get_disassembler): New. * opcode/rl78.h (RL78_Dis_Isa): New. (rl78_decode_opcode): Add ISA parameter. [opcodes] * disassemble.c (disassembler): Choose suitable disassembler based on E_ABI. * rl78-decode.opc (rl78_decode_opcode): Take ISA parameter. Use it to decode mul/div insns. * rl78-decode.c: Regenerate. * rl78-dis.c (print_insn_rl78): Rename to... (print_insn_rl78_common): ...this, take ISA parameter. (print_insn_rl78): New. (print_insn_rl78_g10): New. (print_insn_rl78_g13): New. (print_insn_rl78_g14): New. (rl78_get_disassembler): New. [sim] * rl78/cpu.c (g14_multiply): New. * rl78/cpu.h (g14_multiply): New. * rl78/load.c (rl78_load): Decode ISA completely. * rl78/main.c (main): Expand -M to include other ISAs. * rl78/rl78.c (decode_opcode): Decode based on ISA. * rl78/trace.c (rl78_disasm_fn): New. (sim_disasm_init): Reset it. (sim_disasm_one): Get correct disassembler for ISA. --- gas/ChangeLog | 13 + gas/config/rl78-defs.h | 4 + gas/config/rl78-parse.y | 18 +- gas/config/tc-rl78.c | 18 + gdb/ChangeLog | 5 + gdb/rl78-tdep.c | 2 +- include/ChangeLog | 7 + include/dis-asm.h | 4 + include/opcode/ChangeLog | 5 + include/opcode/rl78.h | 9 +- opcodes/ChangeLog | 15 + opcodes/disassemble.c | 2 +- opcodes/rl78-decode.c | 882 ++++++++++++++++++++++++----------------------- opcodes/rl78-decode.opc | 8 +- opcodes/rl78-dis.c | 49 ++- sim/rl78/ChangeLog | 11 + sim/rl78/cpu.c | 1 + sim/rl78/cpu.h | 1 + sim/rl78/gdb-if.c | 31 ++ sim/rl78/load.c | 19 +- sim/rl78/main.c | 24 +- sim/rl78/mem.c | 18 +- sim/rl78/rl78.c | 10 +- sim/rl78/trace.c | 17 +- 24 files changed, 706 insertions(+), 467 deletions(-) diff --git a/gas/ChangeLog b/gas/ChangeLog index 556c927..1aa506d 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,16 @@ +2015-04-30 DJ Delorie + + * config/rl78-defs.h (rl78_isa_g10): New. + (rl78_isa_g13): New. + (rl78_isa_g14): New. + * config/rl78-parse.y (ISA_G10): New. + (ISA_G13): New. + (ISA_G14): New. + (MULHU, MULH, MULU, DIVHU, DIVWU, MACHU, MACH): Use them. + * config/tc-rl78.c (rl78_isa_g10): New. + (rl78_isa_g13): New. + (rl78_isa_g14): New. + 2015-04-30 H.J. Lu * config/tc-i386.c (i386_target_format): Use "else if" on diff --git a/gas/config/rl78-defs.h b/gas/config/rl78-defs.h index 080c361..67b1dbb 100644 --- a/gas/config/rl78-defs.h +++ b/gas/config/rl78-defs.h @@ -47,6 +47,10 @@ extern void rl78_linkrelax_branch (void); extern int rl78_parse (void); extern int rl78_wrap (void); +extern int rl78_isa_g10 (void); +extern int rl78_isa_g13 (void); +extern int rl78_isa_g14 (void); + extern char * rl78_lex_start; extern char * rl78_lex_end; #endif diff --git a/gas/config/rl78-parse.y b/gas/config/rl78-parse.y index a381973..d2470f0 100644 --- a/gas/config/rl78-parse.y +++ b/gas/config/rl78-parse.y @@ -105,6 +105,10 @@ static int rl78_bit_insn = 0; #define WA(x) if (!expr_is_word_aligned (x)) rl78_error ("Expression not word-aligned"); +#define ISA_G10(s) if (!rl78_isa_g10()) rl78_error (s " is only supported on the G10") +#define ISA_G13(s) if (!rl78_isa_g13()) rl78_error (s " is only supported on the G13") +#define ISA_G14(s) if (!rl78_isa_g14()) rl78_error (s " is only supported on the G14") + static void check_expr_is_bit_index (expressionS); #define Bit(e) check_expr_is_bit_index (e); @@ -500,16 +504,16 @@ statement : /* ---------------------------------------------------------------------- */ - | MULHU + | MULHU { ISA_G14 ("MULHU"); } { B3 (0xce, 0xfb, 0x01); } - | MULH + | MULH { ISA_G14 ("MULHU"); } { B3 (0xce, 0xfb, 0x02); } - | MULU X + | MULU X { ISA_G14 ("MULHU"); } { B1 (0xd6); } - | DIVHU + | DIVHU { ISA_G14 ("MULHU"); } { B3 (0xce, 0xfb, 0x03); } /* Note that the DIVWU encoding was changed from [0xce,0xfb,0x04] to @@ -517,13 +521,13 @@ statement : with the same version number, but varying encodings. The version here matches the hardware. */ - | DIVWU + | DIVWU { ISA_G14 ("MULHU"); } { B3 (0xce, 0xfb, 0x0b); } - | MACHU + | MACHU { ISA_G14 ("MULHU"); } { B3 (0xce, 0xfb, 0x05); } - | MACH + | MACH { ISA_G14 ("MULHU"); } { B3 (0xce, 0xfb, 0x06); } /* ---------------------------------------------------------------------- */ diff --git a/gas/config/tc-rl78.c b/gas/config/tc-rl78.c index b5f0563..3c3f78c 100644 --- a/gas/config/tc-rl78.c +++ b/gas/config/tc-rl78.c @@ -339,6 +339,24 @@ md_parse_option (int c, char * arg ATTRIBUTE_UNUSED) return 0; } +int +rl78_isa_g10 (void) +{ + return (elf_flags & E_FLAG_RL78_CPU_MASK) == E_FLAG_RL78_G10; +} + +int +rl78_isa_g13 (void) +{ + return (elf_flags & E_FLAG_RL78_CPU_MASK) == E_FLAG_RL78_G13; +} + +int +rl78_isa_g14 (void) +{ + return (elf_flags & E_FLAG_RL78_CPU_MASK) == E_FLAG_RL78_G14; +} + void md_show_usage (FILE * stream) { diff --git a/gdb/ChangeLog b/gdb/ChangeLog index ffa5297..c2b5a05 100644 --- a/gdb/ChangeLog +++ b/gdb/ChangeLog @@ -1,3 +1,8 @@ +2015-04-30 DJ Delorie + + * rl78-tdep.c (rl78_analyze_prologue): Pass RL78_ISA_DEFAULT to + rl78_decode_opcode + 2015-04-29 Doug Evans PR python/18285 diff --git a/gdb/rl78-tdep.c b/gdb/rl78-tdep.c index bf96e88..3be2579 100644 --- a/gdb/rl78-tdep.c +++ b/gdb/rl78-tdep.c @@ -921,7 +921,7 @@ rl78_analyze_prologue (CORE_ADDR start_pc, opcode_handle.pc = pc; bytes_read = rl78_decode_opcode (pc, &opc, rl78_get_opcode_byte, - &opcode_handle); + &opcode_handle, RL78_ISA_DEFAULT); next_pc = pc + bytes_read; if (opc.id == RLO_sel) diff --git a/include/ChangeLog b/include/ChangeLog index 55bf46d..b9fb84e 100644 --- a/include/ChangeLog +++ b/include/ChangeLog @@ -1,3 +1,10 @@ +2015-04-30 DJ Delorie + + * dis-asm.h (print_insn_rl78_g10): New. + (print_insn_rl78_g13): New. + (print_insn_rl78_g14): New. + (rl78_get_disassembler): New. + 2015-04-17 Richard Earnshaw Merge from gcc: diff --git a/include/dis-asm.h b/include/dis-asm.h index 198a6f8..ad060ee 100644 --- a/include/dis-asm.h +++ b/include/dis-asm.h @@ -307,9 +307,13 @@ extern int print_insn_z8001 (bfd_vma, disassemble_info *); extern int print_insn_z8002 (bfd_vma, disassemble_info *); extern int print_insn_rx (bfd_vma, disassemble_info *); extern int print_insn_rl78 (bfd_vma, disassemble_info *); +extern int print_insn_rl78_g10 (bfd_vma, disassemble_info *); +extern int print_insn_rl78_g13 (bfd_vma, disassemble_info *); +extern int print_insn_rl78_g14 (bfd_vma, disassemble_info *); extern disassembler_ftype arc_get_disassembler (void *); extern disassembler_ftype cris_get_disassembler (bfd *); +extern disassembler_ftype rl78_get_disassembler (bfd *); extern void print_aarch64_disassembler_options (FILE *); extern void print_i386_disassembler_options (FILE *); diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog index 4a0534f..b5702c5 100644 --- a/include/opcode/ChangeLog +++ b/include/opcode/ChangeLog @@ -1,3 +1,8 @@ +2015-04-30 DJ Delorie + + * rl78.h (RL78_Dis_Isa): New. + (rl78_decode_opcode): Add ISA parameter. + 2015-03-24 Terry Guo * arm.h (arm_feature_set): Extended to provide more available bits. diff --git a/include/opcode/rl78.h b/include/opcode/rl78.h index 72adf14..7358d2d 100644 --- a/include/opcode/rl78.h +++ b/include/opcode/rl78.h @@ -30,6 +30,13 @@ extern "C" { #endif +typedef enum { + RL78_ISA_DEFAULT, + RL78_ISA_G10, + RL78_ISA_G13, + RL78_ISA_G14, +} RL78_Dis_Isa; + /* For the purposes of these structures, the RL78 registers are as follows, despite most of these being memory-mapped and bank-switched: */ @@ -166,7 +173,7 @@ typedef struct RL78_Opcode_Operand op[2]; } RL78_Opcode_Decoded; -int rl78_decode_opcode (unsigned long, RL78_Opcode_Decoded *, int (*)(void *), void *); +int rl78_decode_opcode (unsigned long, RL78_Opcode_Decoded *, int (*)(void *), void *, RL78_Dis_Isa); #ifdef __cplusplus } diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 6b35dc8..35feb97 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,18 @@ +2015-04-30 DJ Delorie + + * disassemble.c (disassembler): Choose suitable disassembler based + on E_ABI. + * rl78-decode.opc (rl78_decode_opcode): Take ISA parameter. Use + it to decode mul/div insns. + * rl78-decode.c: Regenerate. + * rl78-dis.c (print_insn_rl78): Rename to... + (print_insn_rl78_common): ...this, take ISA parameter. + (print_insn_rl78): New. + (print_insn_rl78_g10): New. + (print_insn_rl78_g13): New. + (print_insn_rl78_g14): New. + (rl78_get_disassembler): New. + 2015-04-29 Nick Clifton * po/fr.po: Updated French translation. diff --git a/opcodes/disassemble.c b/opcodes/disassemble.c index f47a190..9c0a10e 100644 --- a/opcodes/disassemble.c +++ b/opcodes/disassemble.c @@ -385,7 +385,7 @@ disassembler (abfd) #endif #ifdef ARCH_rl78 case bfd_arch_rl78: - disassemble = print_insn_rl78; + disassemble = rl78_get_disassembler (abfd); break; #endif #ifdef ARCH_rx diff --git a/opcodes/rl78-decode.c b/opcodes/rl78-decode.c index f4d8ef3..756da87 100644 --- a/opcodes/rl78-decode.c +++ b/opcodes/rl78-decode.c @@ -165,7 +165,8 @@ int rl78_decode_opcode (unsigned long pc AU, RL78_Opcode_Decoded * rl78, int (* getbyte)(void *), - void * ptr) + void * ptr, + RL78_Dis_Isa isa) { LocalData lds, * ld = &lds; unsigned char op_buf[20] = {0}; @@ -200,7 +201,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("nop"); -#line 910 "rl78-decode.opc" +#line 912 "rl78-decode.opc" ID(nop); /*----------------------------------------------------------------------*/ @@ -213,7 +214,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0x07: { /** 0000 0rw1 addw %0, %1 */ -#line 273 "rl78-decode.opc" +#line 274 "rl78-decode.opc" int rw AU = (op[0] >> 1) & 0x03; if (trace) { @@ -223,7 +224,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" rw = 0x%x\n", rw); } SYNTAX("addw %0, %1"); -#line 273 "rl78-decode.opc" +#line 274 "rl78-decode.opc" ID(add); W(); DR(AX); SRW(rw); Fzac; } @@ -238,7 +239,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("addw %0, %e!1"); -#line 264 "rl78-decode.opc" +#line 265 "rl78-decode.opc" ID(add); W(); DR(AX); SM(None, IMMU(2)); Fzac; } @@ -253,7 +254,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("addw %0, #%1"); -#line 270 "rl78-decode.opc" +#line 271 "rl78-decode.opc" ID(add); W(); DR(AX); SC(IMMU(2)); Fzac; } @@ -268,7 +269,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("addw %0, %1"); -#line 276 "rl78-decode.opc" +#line 277 "rl78-decode.opc" ID(add); W(); DR(AX); SM(None, SADDR); Fzac; } @@ -283,7 +284,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("xch a, x"); -#line 1233 "rl78-decode.opc" +#line 1235 "rl78-decode.opc" ID(xch); DR(A); SR(X); /*----------------------------------------------------------------------*/ @@ -300,7 +301,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("mov %0, %e1"); -#line 677 "rl78-decode.opc" +#line 678 "rl78-decode.opc" ID(mov); DR(A); SM(B, IMMU(2)); } @@ -315,7 +316,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("add %0, #%1"); -#line 227 "rl78-decode.opc" +#line 228 "rl78-decode.opc" ID(add); DM(None, SADDR); SC(IMMU(1)); Fzac; /*----------------------------------------------------------------------*/ @@ -332,7 +333,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("add %0, %1"); -#line 221 "rl78-decode.opc" +#line 222 "rl78-decode.opc" ID(add); DR(A); SM(None, SADDR); Fzac; } @@ -347,7 +348,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("add %0, #%1"); -#line 215 "rl78-decode.opc" +#line 216 "rl78-decode.opc" ID(add); DR(A); SC(IMMU(1)); Fzac; } @@ -362,7 +363,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("add %0, %e1"); -#line 203 "rl78-decode.opc" +#line 204 "rl78-decode.opc" ID(add); DR(A); SM(HL, 0); Fzac; } @@ -377,7 +378,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("add %0, %ea1"); -#line 209 "rl78-decode.opc" +#line 210 "rl78-decode.opc" ID(add); DR(A); SM(HL, IMMU(1)); Fzac; } @@ -392,7 +393,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("add %0, %e!1"); -#line 200 "rl78-decode.opc" +#line 201 "rl78-decode.opc" ID(add); DR(A); SM(None, IMMU(2)); Fzac; } @@ -407,7 +408,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("addw %0, #%1"); -#line 279 "rl78-decode.opc" +#line 280 "rl78-decode.opc" ID(add); W(); DR(SP); SC(IMMU(1)); Fzac; /*----------------------------------------------------------------------*/ @@ -424,7 +425,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("es:"); -#line 192 "rl78-decode.opc" +#line 193 "rl78-decode.opc" DE(); SE(); op ++; pc ++; @@ -439,7 +440,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0x16: { /** 0001 0ra0 movw %0, %1 */ -#line 858 "rl78-decode.opc" +#line 859 "rl78-decode.opc" int ra AU = (op[0] >> 1) & 0x03; if (trace) { @@ -449,7 +450,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" ra = 0x%x\n", ra); } SYNTAX("movw %0, %1"); -#line 858 "rl78-decode.opc" +#line 859 "rl78-decode.opc" ID(mov); W(); DRW(ra); SR(AX); } @@ -459,7 +460,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0x17: { /** 0001 0ra1 movw %0, %1 */ -#line 855 "rl78-decode.opc" +#line 856 "rl78-decode.opc" int ra AU = (op[0] >> 1) & 0x03; if (trace) { @@ -469,7 +470,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" ra = 0x%x\n", ra); } SYNTAX("movw %0, %1"); -#line 855 "rl78-decode.opc" +#line 856 "rl78-decode.opc" ID(mov); W(); DR(AX); SRW(ra); } @@ -484,7 +485,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("mov %e0, %1"); -#line 728 "rl78-decode.opc" +#line 729 "rl78-decode.opc" ID(mov); DM(B, IMMU(2)); SR(A); } @@ -499,7 +500,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("mov %e0, #%1"); -#line 725 "rl78-decode.opc" +#line 726 "rl78-decode.opc" ID(mov); DM(B, IMMU(2)); SC(IMMU(1)); } @@ -514,7 +515,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("addc %0, #%1"); -#line 259 "rl78-decode.opc" +#line 260 "rl78-decode.opc" ID(addc); DM(None, SADDR); SC(IMMU(1)); Fzac; /*----------------------------------------------------------------------*/ @@ -531,7 +532,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("addc %0, %1"); -#line 256 "rl78-decode.opc" +#line 257 "rl78-decode.opc" ID(addc); DR(A); SM(None, SADDR); Fzac; } @@ -546,7 +547,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("addc %0, #%1"); -#line 247 "rl78-decode.opc" +#line 248 "rl78-decode.opc" ID(addc); DR(A); SC(IMMU(1)); Fzac; } @@ -561,22 +562,22 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("addc %0, %e1"); -#line 235 "rl78-decode.opc" +#line 236 "rl78-decode.opc" ID(addc); DR(A); SM(HL, 0); Fzac; } break; case 0x1e: { - /** 0001 1110 addc %0, %ea1 */ + /** 0001 1110 addc %0, %ea1 */ if (trace) { printf ("\033[33m%s\033[0m %02x\n", - "/** 0001 1110 addc %0, %ea1 */", + "/** 0001 1110 addc %0, %ea1 */", op[0]); } SYNTAX("addc %0, %ea1"); -#line 244 "rl78-decode.opc" +#line 245 "rl78-decode.opc" ID(addc); DR(A); SM(HL, IMMU(1)); Fzac; } @@ -591,7 +592,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("addc %0, %e!1"); -#line 232 "rl78-decode.opc" +#line 233 "rl78-decode.opc" ID(addc); DR(A); SM(None, IMMU(2)); Fzac; } @@ -606,7 +607,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("subw %0, #%1"); -#line 1197 "rl78-decode.opc" +#line 1199 "rl78-decode.opc" ID(sub); W(); DR(SP); SC(IMMU(1)); Fzac; /*----------------------------------------------------------------------*/ @@ -619,7 +620,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0x27: { /** 0010 0rw1 subw %0, %1 */ -#line 1191 "rl78-decode.opc" +#line 1193 "rl78-decode.opc" int rw AU = (op[0] >> 1) & 0x03; if (trace) { @@ -629,7 +630,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" rw = 0x%x\n", rw); } SYNTAX("subw %0, %1"); -#line 1191 "rl78-decode.opc" +#line 1193 "rl78-decode.opc" ID(sub); W(); DR(AX); SRW(rw); Fzac; } @@ -644,7 +645,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("subw %0, %e!1"); -#line 1182 "rl78-decode.opc" +#line 1184 "rl78-decode.opc" ID(sub); W(); DR(AX); SM(None, IMMU(2)); Fzac; } @@ -659,7 +660,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("subw %0, #%1"); -#line 1188 "rl78-decode.opc" +#line 1190 "rl78-decode.opc" ID(sub); W(); DR(AX); SC(IMMU(2)); Fzac; } @@ -674,7 +675,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("subw %0, %1"); -#line 1194 "rl78-decode.opc" +#line 1196 "rl78-decode.opc" ID(sub); W(); DR(AX); SM(None, SADDR); Fzac; } @@ -689,7 +690,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("mov %e0, %1"); -#line 740 "rl78-decode.opc" +#line 741 "rl78-decode.opc" ID(mov); DM(C, IMMU(2)); SR(A); } @@ -704,7 +705,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("mov %0, %e1"); -#line 683 "rl78-decode.opc" +#line 684 "rl78-decode.opc" ID(mov); DR(A); SM(C, IMMU(2)); } @@ -719,7 +720,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("sub %0, #%1"); -#line 1145 "rl78-decode.opc" +#line 1147 "rl78-decode.opc" ID(sub); DM(None, SADDR); SC(IMMU(1)); Fzac; /*----------------------------------------------------------------------*/ @@ -736,7 +737,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("sub %0, %1"); -#line 1139 "rl78-decode.opc" +#line 1141 "rl78-decode.opc" ID(sub); DR(A); SM(None, SADDR); Fzac; } @@ -751,7 +752,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("sub %0, #%1"); -#line 1133 "rl78-decode.opc" +#line 1135 "rl78-decode.opc" ID(sub); DR(A); SC(IMMU(1)); Fzac; } @@ -766,22 +767,22 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("sub %0, %e1"); -#line 1121 "rl78-decode.opc" +#line 1123 "rl78-decode.opc" ID(sub); DR(A); SM(HL, 0); Fzac; } break; case 0x2e: { - /** 0010 1110 sub %0, %ea1 */ + /** 0010 1110 sub %0, %ea1 */ if (trace) { printf ("\033[33m%s\033[0m %02x\n", - "/** 0010 1110 sub %0, %ea1 */", + "/** 0010 1110 sub %0, %ea1 */", op[0]); } SYNTAX("sub %0, %ea1"); -#line 1127 "rl78-decode.opc" +#line 1129 "rl78-decode.opc" ID(sub); DR(A); SM(HL, IMMU(1)); Fzac; } @@ -796,7 +797,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("sub %0, %e!1"); -#line 1118 "rl78-decode.opc" +#line 1120 "rl78-decode.opc" ID(sub); DR(A); SM(None, IMMU(2)); Fzac; } @@ -807,7 +808,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0x36: { /** 0011 0rg0 movw %0, #%1 */ -#line 852 "rl78-decode.opc" +#line 853 "rl78-decode.opc" int rg AU = (op[0] >> 1) & 0x03; if (trace) { @@ -817,7 +818,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" rg = 0x%x\n", rg); } SYNTAX("movw %0, #%1"); -#line 852 "rl78-decode.opc" +#line 853 "rl78-decode.opc" ID(mov); W(); DRW(rg); SC(IMMU(2)); } @@ -829,7 +830,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0x00: { /** 0011 0001 0bit 0000 btclr %s1, $%a0 */ -#line 415 "rl78-decode.opc" +#line 416 "rl78-decode.opc" int bit AU = (op[1] >> 4) & 0x07; if (trace) { @@ -839,7 +840,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" bit = 0x%x\n", bit); } SYNTAX("btclr %s1, $%a0"); -#line 415 "rl78-decode.opc" +#line 416 "rl78-decode.opc" ID(branch_cond_clear); SM(None, SADDR); SB(bit); DC(pc+IMMS(1)+4); COND(T); /*----------------------------------------------------------------------*/ @@ -849,7 +850,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0x01: { /** 0011 0001 0bit 0001 btclr %1, $%a0 */ -#line 409 "rl78-decode.opc" +#line 410 "rl78-decode.opc" int bit AU = (op[1] >> 4) & 0x07; if (trace) { @@ -859,7 +860,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" bit = 0x%x\n", bit); } SYNTAX("btclr %1, $%a0"); -#line 409 "rl78-decode.opc" +#line 410 "rl78-decode.opc" ID(branch_cond_clear); DC(pc+IMMS(1)+3); SR(A); SB(bit); COND(T); } @@ -867,7 +868,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0x02: { /** 0011 0001 0bit 0010 bt %s1, $%a0 */ -#line 401 "rl78-decode.opc" +#line 402 "rl78-decode.opc" int bit AU = (op[1] >> 4) & 0x07; if (trace) { @@ -877,7 +878,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" bit = 0x%x\n", bit); } SYNTAX("bt %s1, $%a0"); -#line 401 "rl78-decode.opc" +#line 402 "rl78-decode.opc" ID(branch_cond); SM(None, SADDR); SB(bit); DC(pc+IMMS(1)+4); COND(T); /*----------------------------------------------------------------------*/ @@ -887,7 +888,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0x03: { /** 0011 0001 0bit 0011 bt %1, $%a0 */ -#line 395 "rl78-decode.opc" +#line 396 "rl78-decode.opc" int bit AU = (op[1] >> 4) & 0x07; if (trace) { @@ -897,7 +898,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" bit = 0x%x\n", bit); } SYNTAX("bt %1, $%a0"); -#line 395 "rl78-decode.opc" +#line 396 "rl78-decode.opc" ID(branch_cond); DC(pc+IMMS(1)+3); SR(A); SB(bit); COND(T); } @@ -905,7 +906,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0x04: { /** 0011 0001 0bit 0100 bf %s1, $%a0 */ -#line 362 "rl78-decode.opc" +#line 363 "rl78-decode.opc" int bit AU = (op[1] >> 4) & 0x07; if (trace) { @@ -915,7 +916,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" bit = 0x%x\n", bit); } SYNTAX("bf %s1, $%a0"); -#line 362 "rl78-decode.opc" +#line 363 "rl78-decode.opc" ID(branch_cond); SM(None, SADDR); SB(bit); DC(pc+IMMS(1)+4); COND(F); /*----------------------------------------------------------------------*/ @@ -925,7 +926,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0x05: { /** 0011 0001 0bit 0101 bf %1, $%a0 */ -#line 356 "rl78-decode.opc" +#line 357 "rl78-decode.opc" int bit AU = (op[1] >> 4) & 0x07; if (trace) { @@ -935,7 +936,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" bit = 0x%x\n", bit); } SYNTAX("bf %1, $%a0"); -#line 356 "rl78-decode.opc" +#line 357 "rl78-decode.opc" ID(branch_cond); DC(pc+IMMS(1)+3); SR(A); SB(bit); COND(F); } @@ -943,7 +944,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0x07: { /** 0011 0001 0cnt 0111 shl %0, %1 */ -#line 1074 "rl78-decode.opc" +#line 1076 "rl78-decode.opc" int cnt AU = (op[1] >> 4) & 0x07; if (trace) { @@ -953,7 +954,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" cnt = 0x%x\n", cnt); } SYNTAX("shl %0, %1"); -#line 1074 "rl78-decode.opc" +#line 1076 "rl78-decode.opc" ID(shl); DR(C); SC(cnt); } @@ -961,7 +962,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0x08: { /** 0011 0001 0cnt 1000 shl %0, %1 */ -#line 1071 "rl78-decode.opc" +#line 1073 "rl78-decode.opc" int cnt AU = (op[1] >> 4) & 0x07; if (trace) { @@ -971,7 +972,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" cnt = 0x%x\n", cnt); } SYNTAX("shl %0, %1"); -#line 1071 "rl78-decode.opc" +#line 1073 "rl78-decode.opc" ID(shl); DR(B); SC(cnt); } @@ -979,7 +980,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0x09: { /** 0011 0001 0cnt 1001 shl %0, %1 */ -#line 1068 "rl78-decode.opc" +#line 1070 "rl78-decode.opc" int cnt AU = (op[1] >> 4) & 0x07; if (trace) { @@ -989,7 +990,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" cnt = 0x%x\n", cnt); } SYNTAX("shl %0, %1"); -#line 1068 "rl78-decode.opc" +#line 1070 "rl78-decode.opc" ID(shl); DR(A); SC(cnt); } @@ -997,7 +998,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0x0a: { /** 0011 0001 0cnt 1010 shr %0, %1 */ -#line 1085 "rl78-decode.opc" +#line 1087 "rl78-decode.opc" int cnt AU = (op[1] >> 4) & 0x07; if (trace) { @@ -1007,7 +1008,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" cnt = 0x%x\n", cnt); } SYNTAX("shr %0, %1"); -#line 1085 "rl78-decode.opc" +#line 1087 "rl78-decode.opc" ID(shr); DR(A); SC(cnt); } @@ -1015,7 +1016,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0x0b: { /** 0011 0001 0cnt 1011 sar %0, %1 */ -#line 1032 "rl78-decode.opc" +#line 1034 "rl78-decode.opc" int cnt AU = (op[1] >> 4) & 0x07; if (trace) { @@ -1025,7 +1026,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" cnt = 0x%x\n", cnt); } SYNTAX("sar %0, %1"); -#line 1032 "rl78-decode.opc" +#line 1034 "rl78-decode.opc" ID(sar); DR(A); SC(cnt); } @@ -1034,7 +1035,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0x8c: { /** 0011 0001 wcnt 1100 shlw %0, %1 */ -#line 1080 "rl78-decode.opc" +#line 1082 "rl78-decode.opc" int wcnt AU = (op[1] >> 4) & 0x0f; if (trace) { @@ -1044,7 +1045,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" wcnt = 0x%x\n", wcnt); } SYNTAX("shlw %0, %1"); -#line 1080 "rl78-decode.opc" +#line 1082 "rl78-decode.opc" ID(shl); W(); DR(BC); SC(wcnt); /*----------------------------------------------------------------------*/ @@ -1055,7 +1056,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0x8d: { /** 0011 0001 wcnt 1101 shlw %0, %1 */ -#line 1077 "rl78-decode.opc" +#line 1079 "rl78-decode.opc" int wcnt AU = (op[1] >> 4) & 0x0f; if (trace) { @@ -1065,7 +1066,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" wcnt = 0x%x\n", wcnt); } SYNTAX("shlw %0, %1"); -#line 1077 "rl78-decode.opc" +#line 1079 "rl78-decode.opc" ID(shl); W(); DR(AX); SC(wcnt); } @@ -1074,7 +1075,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0x8e: { /** 0011 0001 wcnt 1110 shrw %0, %1 */ -#line 1088 "rl78-decode.opc" +#line 1090 "rl78-decode.opc" int wcnt AU = (op[1] >> 4) & 0x0f; if (trace) { @@ -1084,7 +1085,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" wcnt = 0x%x\n", wcnt); } SYNTAX("shrw %0, %1"); -#line 1088 "rl78-decode.opc" +#line 1090 "rl78-decode.opc" ID(shr); W(); DR(AX); SC(wcnt); /*----------------------------------------------------------------------*/ @@ -1095,7 +1096,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0x8f: { /** 0011 0001 wcnt 1111 sarw %0, %1 */ -#line 1035 "rl78-decode.opc" +#line 1037 "rl78-decode.opc" int wcnt AU = (op[1] >> 4) & 0x0f; if (trace) { @@ -1105,7 +1106,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" wcnt = 0x%x\n", wcnt); } SYNTAX("sarw %0, %1"); -#line 1035 "rl78-decode.opc" +#line 1037 "rl78-decode.opc" ID(sar); W(); DR(AX); SC(wcnt); /*----------------------------------------------------------------------*/ @@ -1115,7 +1116,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0x80: { /** 0011 0001 1bit 0000 btclr %s1, $%a0 */ -#line 412 "rl78-decode.opc" +#line 413 "rl78-decode.opc" int bit AU = (op[1] >> 4) & 0x07; if (trace) { @@ -1125,7 +1126,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" bit = 0x%x\n", bit); } SYNTAX("btclr %s1, $%a0"); -#line 412 "rl78-decode.opc" +#line 413 "rl78-decode.opc" ID(branch_cond_clear); SM(None, SFR); SB(bit); DC(pc+IMMS(1)+4); COND(T); } @@ -1133,7 +1134,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0x81: { /** 0011 0001 1bit 0001 btclr %e1, $%a0 */ -#line 406 "rl78-decode.opc" +#line 407 "rl78-decode.opc" int bit AU = (op[1] >> 4) & 0x07; if (trace) { @@ -1143,7 +1144,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" bit = 0x%x\n", bit); } SYNTAX("btclr %e1, $%a0"); -#line 406 "rl78-decode.opc" +#line 407 "rl78-decode.opc" ID(branch_cond_clear); DC(pc+IMMS(1)+3); SM(HL,0); SB(bit); COND(T); } @@ -1151,7 +1152,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0x82: { /** 0011 0001 1bit 0010 bt %s1, $%a0 */ -#line 398 "rl78-decode.opc" +#line 399 "rl78-decode.opc" int bit AU = (op[1] >> 4) & 0x07; if (trace) { @@ -1161,7 +1162,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" bit = 0x%x\n", bit); } SYNTAX("bt %s1, $%a0"); -#line 398 "rl78-decode.opc" +#line 399 "rl78-decode.opc" ID(branch_cond); SM(None, SFR); SB(bit); DC(pc+IMMS(1)+4); COND(T); } @@ -1169,7 +1170,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0x83: { /** 0011 0001 1bit 0011 bt %e1, $%a0 */ -#line 392 "rl78-decode.opc" +#line 393 "rl78-decode.opc" int bit AU = (op[1] >> 4) & 0x07; if (trace) { @@ -1179,7 +1180,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" bit = 0x%x\n", bit); } SYNTAX("bt %e1, $%a0"); -#line 392 "rl78-decode.opc" +#line 393 "rl78-decode.opc" ID(branch_cond); DC(pc+IMMS(1)+3); SM(HL,0); SB(bit); COND(T); } @@ -1187,7 +1188,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0x84: { /** 0011 0001 1bit 0100 bf %s1, $%a0 */ -#line 359 "rl78-decode.opc" +#line 360 "rl78-decode.opc" int bit AU = (op[1] >> 4) & 0x07; if (trace) { @@ -1197,7 +1198,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" bit = 0x%x\n", bit); } SYNTAX("bf %s1, $%a0"); -#line 359 "rl78-decode.opc" +#line 360 "rl78-decode.opc" ID(branch_cond); SM(None, SFR); SB(bit); DC(pc+IMMS(1)+4); COND(F); } @@ -1205,7 +1206,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0x85: { /** 0011 0001 1bit 0101 bf %e1, $%a0 */ -#line 353 "rl78-decode.opc" +#line 354 "rl78-decode.opc" int bit AU = (op[1] >> 4) & 0x07; if (trace) { @@ -1215,7 +1216,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" bit = 0x%x\n", bit); } SYNTAX("bf %e1, $%a0"); -#line 353 "rl78-decode.opc" +#line 354 "rl78-decode.opc" ID(branch_cond); DC(pc+IMMS(1)+3); SM(HL,0); SB(bit); COND(F); } @@ -1228,7 +1229,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0x37: { /** 0011 0ra1 xchw %0, %1 */ -#line 1238 "rl78-decode.opc" +#line 1240 "rl78-decode.opc" int ra AU = (op[0] >> 1) & 0x03; if (trace) { @@ -1238,7 +1239,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" ra = 0x%x\n", ra); } SYNTAX("xchw %0, %1"); -#line 1238 "rl78-decode.opc" +#line 1240 "rl78-decode.opc" ID(xch); W(); DR(AX); SRW(ra); /*----------------------------------------------------------------------*/ @@ -1255,7 +1256,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("mov %e0, #%1"); -#line 737 "rl78-decode.opc" +#line 738 "rl78-decode.opc" ID(mov); DM(C, IMMU(2)); SC(IMMU(1)); } @@ -1270,7 +1271,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("mov %e0, #%1"); -#line 731 "rl78-decode.opc" +#line 732 "rl78-decode.opc" ID(mov); DM(BC, IMMU(2)); SC(IMMU(1)); } @@ -1285,7 +1286,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("subc %0, #%1"); -#line 1177 "rl78-decode.opc" +#line 1179 "rl78-decode.opc" ID(subc); DM(None, SADDR); SC(IMMU(1)); Fzac; /*----------------------------------------------------------------------*/ @@ -1302,7 +1303,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("subc %0, %1"); -#line 1174 "rl78-decode.opc" +#line 1176 "rl78-decode.opc" ID(subc); DR(A); SM(None, SADDR); Fzac; } @@ -1317,7 +1318,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("subc %0, #%1"); -#line 1165 "rl78-decode.opc" +#line 1167 "rl78-decode.opc" ID(subc); DR(A); SC(IMMU(1)); Fzac; } @@ -1332,22 +1333,22 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("subc %0, %e1"); -#line 1153 "rl78-decode.opc" +#line 1155 "rl78-decode.opc" ID(subc); DR(A); SM(HL, 0); Fzac; } break; case 0x3e: { - /** 0011 1110 subc %0, %ea1 */ + /** 0011 1110 subc %0, %ea1 */ if (trace) { printf ("\033[33m%s\033[0m %02x\n", - "/** 0011 1110 subc %0, %ea1 */", + "/** 0011 1110 subc %0, %ea1 */", op[0]); } SYNTAX("subc %0, %ea1"); -#line 1162 "rl78-decode.opc" +#line 1164 "rl78-decode.opc" ID(subc); DR(A); SM(HL, IMMU(1)); Fzac; } @@ -1362,7 +1363,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("subc %0, %e!1"); -#line 1150 "rl78-decode.opc" +#line 1152 "rl78-decode.opc" ID(subc); DR(A); SM(None, IMMU(2)); Fzac; } @@ -1377,7 +1378,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("cmp %e!0, #%1"); -#line 479 "rl78-decode.opc" +#line 480 "rl78-decode.opc" ID(cmp); DM(None, IMMU(2)); SC(IMMU(1)); Fzac; } @@ -1392,7 +1393,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("mov %0, #%1"); -#line 716 "rl78-decode.opc" +#line 717 "rl78-decode.opc" ID(mov); DR(ES); SC(IMMU(1)); } @@ -1407,7 +1408,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("cmpw %0, %e!1"); -#line 530 "rl78-decode.opc" +#line 531 "rl78-decode.opc" ID(cmp); W(); DR(AX); SM(None, IMMU(2)); Fzac; } @@ -1417,7 +1418,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0x47: { /** 0100 0ra1 cmpw %0, %1 */ -#line 539 "rl78-decode.opc" +#line 540 "rl78-decode.opc" int ra AU = (op[0] >> 1) & 0x03; if (trace) { @@ -1427,7 +1428,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" ra = 0x%x\n", ra); } SYNTAX("cmpw %0, %1"); -#line 539 "rl78-decode.opc" +#line 540 "rl78-decode.opc" ID(cmp); W(); DR(AX); SRW(ra); Fzac; } @@ -1442,7 +1443,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("cmpw %0, #%1"); -#line 536 "rl78-decode.opc" +#line 537 "rl78-decode.opc" ID(cmp); W(); DR(AX); SC(IMMU(2)); Fzac; } @@ -1457,7 +1458,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("cmpw %0, %1"); -#line 542 "rl78-decode.opc" +#line 543 "rl78-decode.opc" ID(cmp); W(); DR(AX); SM(None, SADDR); Fzac; /*----------------------------------------------------------------------*/ @@ -1474,7 +1475,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("mov %e0, %1"); -#line 734 "rl78-decode.opc" +#line 735 "rl78-decode.opc" ID(mov); DM(BC, IMMU(2)); SR(A); } @@ -1489,7 +1490,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("mov %0, %e1"); -#line 680 "rl78-decode.opc" +#line 681 "rl78-decode.opc" ID(mov); DR(A); SM(BC, IMMU(2)); } @@ -1504,7 +1505,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("cmp %0, #%1"); -#line 482 "rl78-decode.opc" +#line 483 "rl78-decode.opc" ID(cmp); DM(None, SADDR); SC(IMMU(1)); Fzac; } @@ -1519,7 +1520,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("cmp %0, %1"); -#line 509 "rl78-decode.opc" +#line 510 "rl78-decode.opc" ID(cmp); DR(A); SM(None, SADDR); Fzac; /*----------------------------------------------------------------------*/ @@ -1536,7 +1537,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("cmp %0, #%1"); -#line 500 "rl78-decode.opc" +#line 501 "rl78-decode.opc" ID(cmp); DR(A); SC(IMMU(1)); Fzac; } @@ -1551,22 +1552,22 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("cmp %0, %e1"); -#line 488 "rl78-decode.opc" +#line 489 "rl78-decode.opc" ID(cmp); DR(A); SM(HL, 0); Fzac; } break; case 0x4e: { - /** 0100 1110 cmp %0, %ea1 */ + /** 0100 1110 cmp %0, %ea1 */ if (trace) { printf ("\033[33m%s\033[0m %02x\n", - "/** 0100 1110 cmp %0, %ea1 */", + "/** 0100 1110 cmp %0, %ea1 */", op[0]); } SYNTAX("cmp %0, %ea1"); -#line 497 "rl78-decode.opc" +#line 498 "rl78-decode.opc" ID(cmp); DR(A); SM(HL, IMMU(1)); Fzac; } @@ -1581,7 +1582,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("cmp %0, %e!1"); -#line 485 "rl78-decode.opc" +#line 486 "rl78-decode.opc" ID(cmp); DR(A); SM(None, IMMU(2)); Fzac; } @@ -1596,7 +1597,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0x57: { /** 0101 0reg mov %0, #%1 */ -#line 668 "rl78-decode.opc" +#line 669 "rl78-decode.opc" int reg AU = op[0] & 0x07; if (trace) { @@ -1606,7 +1607,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" reg = 0x%x\n", reg); } SYNTAX("mov %0, #%1"); -#line 668 "rl78-decode.opc" +#line 669 "rl78-decode.opc" ID(mov); DRB(reg); SC(IMMU(1)); } @@ -1621,7 +1622,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("movw %e0, %1"); -#line 870 "rl78-decode.opc" +#line 871 "rl78-decode.opc" ID(mov); W(); DM(B, IMMU(2)); SR(AX); } @@ -1636,7 +1637,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("movw %0, %e1"); -#line 861 "rl78-decode.opc" +#line 862 "rl78-decode.opc" ID(mov); W(); DR(AX); SM(B, IMMU(2)); } @@ -1651,7 +1652,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("and %0, #%1"); -#line 311 "rl78-decode.opc" +#line 312 "rl78-decode.opc" ID(and); DM(None, SADDR); SC(IMMU(1)); Fz; /*----------------------------------------------------------------------*/ @@ -1668,7 +1669,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("and %0, %1"); -#line 308 "rl78-decode.opc" +#line 309 "rl78-decode.opc" ID(and); DR(A); SM(None, SADDR); Fz; } @@ -1683,7 +1684,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("and %0, #%1"); -#line 299 "rl78-decode.opc" +#line 300 "rl78-decode.opc" ID(and); DR(A); SC(IMMU(1)); Fz; } @@ -1698,7 +1699,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("and %0, %e1"); -#line 287 "rl78-decode.opc" +#line 288 "rl78-decode.opc" ID(and); DR(A); SM(HL, 0); Fz; } @@ -1713,7 +1714,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("and %0, %ea1"); -#line 293 "rl78-decode.opc" +#line 294 "rl78-decode.opc" ID(and); DR(A); SM(HL, IMMU(1)); Fz; } @@ -1728,7 +1729,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("and %0, %e!1"); -#line 284 "rl78-decode.opc" +#line 285 "rl78-decode.opc" ID(and); DR(A); SM(None, IMMU(2)); Fz; } @@ -1742,7 +1743,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0x67: { /** 0110 0rba mov %0, %1 */ -#line 671 "rl78-decode.opc" +#line 672 "rl78-decode.opc" int rba AU = op[0] & 0x07; if (trace) { @@ -1752,7 +1753,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" rba = 0x%x\n", rba); } SYNTAX("mov %0, %1"); -#line 671 "rl78-decode.opc" +#line 672 "rl78-decode.opc" ID(mov); DR(A); SRB(rba); } @@ -1771,7 +1772,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0x07: { /** 0110 0001 0000 0reg add %0, %1 */ -#line 224 "rl78-decode.opc" +#line 225 "rl78-decode.opc" int reg AU = op[1] & 0x07; if (trace) { @@ -1781,7 +1782,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" reg = 0x%x\n", reg); } SYNTAX("add %0, %1"); -#line 224 "rl78-decode.opc" +#line 225 "rl78-decode.opc" ID(add); DRB(reg); SR(A); Fzac; } @@ -1795,7 +1796,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0x0f: { /** 0110 0001 0000 1rba add %0, %1 */ -#line 218 "rl78-decode.opc" +#line 219 "rl78-decode.opc" int rba AU = op[1] & 0x07; if (trace) { @@ -1805,7 +1806,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" rba = 0x%x\n", rba); } SYNTAX("add %0, %1"); -#line 218 "rl78-decode.opc" +#line 219 "rl78-decode.opc" ID(add); DR(A); SRB(rba); Fzac; } @@ -1820,7 +1821,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0], op[1]); } SYNTAX("addw %0, %ea1"); -#line 267 "rl78-decode.opc" +#line 268 "rl78-decode.opc" ID(add); W(); DR(AX); SM(HL, IMMU(1)); Fzac; } @@ -1835,7 +1836,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0x17: { /** 0110 0001 0001 0reg addc %0, %1 */ -#line 253 "rl78-decode.opc" +#line 254 "rl78-decode.opc" int reg AU = op[1] & 0x07; if (trace) { @@ -1845,7 +1846,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" reg = 0x%x\n", reg); } SYNTAX("addc %0, %1"); -#line 253 "rl78-decode.opc" +#line 254 "rl78-decode.opc" ID(addc); DRB(reg); SR(A); Fzac; } @@ -1859,7 +1860,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0x1f: { /** 0110 0001 0001 1rba addc %0, %1 */ -#line 250 "rl78-decode.opc" +#line 251 "rl78-decode.opc" int rba AU = op[1] & 0x07; if (trace) { @@ -1869,7 +1870,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" rba = 0x%x\n", rba); } SYNTAX("addc %0, %1"); -#line 250 "rl78-decode.opc" +#line 251 "rl78-decode.opc" ID(addc); DR(A); SRB(rba); Fzac; } @@ -1884,7 +1885,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0x27: { /** 0110 0001 0010 0reg sub %0, %1 */ -#line 1142 "rl78-decode.opc" +#line 1144 "rl78-decode.opc" int reg AU = op[1] & 0x07; if (trace) { @@ -1894,7 +1895,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" reg = 0x%x\n", reg); } SYNTAX("sub %0, %1"); -#line 1142 "rl78-decode.opc" +#line 1144 "rl78-decode.opc" ID(sub); DRB(reg); SR(A); Fzac; } @@ -1908,7 +1909,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0x2f: { /** 0110 0001 0010 1rba sub %0, %1 */ -#line 1136 "rl78-decode.opc" +#line 1138 "rl78-decode.opc" int rba AU = op[1] & 0x07; if (trace) { @@ -1918,22 +1919,22 @@ rl78_decode_opcode (unsigned long pc AU, printf (" rba = 0x%x\n", rba); } SYNTAX("sub %0, %1"); -#line 1136 "rl78-decode.opc" +#line 1138 "rl78-decode.opc" ID(sub); DR(A); SRB(rba); Fzac; } break; case 0x29: { - /** 0110 0001 0010 1001 subw %0, %ea1 */ + /** 0110 0001 0010 1001 subw %0, %ea1 */ if (trace) { printf ("\033[33m%s\033[0m %02x %02x\n", - "/** 0110 0001 0010 1001 subw %0, %ea1 */", + "/** 0110 0001 0010 1001 subw %0, %ea1 */", op[0], op[1]); } SYNTAX("subw %0, %ea1"); -#line 1185 "rl78-decode.opc" +#line 1187 "rl78-decode.opc" ID(sub); W(); DR(AX); SM(HL, IMMU(1)); Fzac; } @@ -1948,7 +1949,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0x37: { /** 0110 0001 0011 0reg subc %0, %1 */ -#line 1171 "rl78-decode.opc" +#line 1173 "rl78-decode.opc" int reg AU = op[1] & 0x07; if (trace) { @@ -1958,7 +1959,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" reg = 0x%x\n", reg); } SYNTAX("subc %0, %1"); -#line 1171 "rl78-decode.opc" +#line 1173 "rl78-decode.opc" ID(subc); DRB(reg); SR(A); Fzac; } @@ -1972,7 +1973,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0x3f: { /** 0110 0001 0011 1rba subc %0, %1 */ -#line 1168 "rl78-decode.opc" +#line 1170 "rl78-decode.opc" int rba AU = op[1] & 0x07; if (trace) { @@ -1982,7 +1983,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" rba = 0x%x\n", rba); } SYNTAX("subc %0, %1"); -#line 1168 "rl78-decode.opc" +#line 1170 "rl78-decode.opc" ID(subc); DR(A); SRB(rba); Fzac; } @@ -1997,7 +1998,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0x47: { /** 0110 0001 0100 0reg cmp %0, %1 */ -#line 506 "rl78-decode.opc" +#line 507 "rl78-decode.opc" int reg AU = op[1] & 0x07; if (trace) { @@ -2007,7 +2008,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" reg = 0x%x\n", reg); } SYNTAX("cmp %0, %1"); -#line 506 "rl78-decode.opc" +#line 507 "rl78-decode.opc" ID(cmp); DRB(reg); SR(A); Fzac; } @@ -2021,7 +2022,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0x4f: { /** 0110 0001 0100 1rba cmp %0, %1 */ -#line 503 "rl78-decode.opc" +#line 504 "rl78-decode.opc" int rba AU = op[1] & 0x07; if (trace) { @@ -2031,22 +2032,22 @@ rl78_decode_opcode (unsigned long pc AU, printf (" rba = 0x%x\n", rba); } SYNTAX("cmp %0, %1"); -#line 503 "rl78-decode.opc" +#line 504 "rl78-decode.opc" ID(cmp); DR(A); SRB(rba); Fzac; } break; case 0x49: { - /** 0110 0001 0100 1001 cmpw %0, %ea1 */ + /** 0110 0001 0100 1001 cmpw %0, %ea1 */ if (trace) { printf ("\033[33m%s\033[0m %02x %02x\n", - "/** 0110 0001 0100 1001 cmpw %0, %ea1 */", + "/** 0110 0001 0100 1001 cmpw %0, %ea1 */", op[0], op[1]); } SYNTAX("cmpw %0, %ea1"); -#line 533 "rl78-decode.opc" +#line 534 "rl78-decode.opc" ID(cmp); W(); DR(AX); SM(HL, IMMU(1)); Fzac; } @@ -2061,7 +2062,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0x57: { /** 0110 0001 0101 0reg and %0, %1 */ -#line 305 "rl78-decode.opc" +#line 306 "rl78-decode.opc" int reg AU = op[1] & 0x07; if (trace) { @@ -2071,7 +2072,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" reg = 0x%x\n", reg); } SYNTAX("and %0, %1"); -#line 305 "rl78-decode.opc" +#line 306 "rl78-decode.opc" ID(and); DRB(reg); SR(A); Fz; } @@ -2085,7 +2086,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0x5f: { /** 0110 0001 0101 1rba and %0, %1 */ -#line 302 "rl78-decode.opc" +#line 303 "rl78-decode.opc" int rba AU = op[1] & 0x07; if (trace) { @@ -2095,7 +2096,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" rba = 0x%x\n", rba); } SYNTAX("and %0, %1"); -#line 302 "rl78-decode.opc" +#line 303 "rl78-decode.opc" ID(and); DR(A); SRB(rba); Fz; } @@ -2110,7 +2111,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0], op[1]); } SYNTAX("inc %ea0"); -#line 583 "rl78-decode.opc" +#line 584 "rl78-decode.opc" ID(add); DM(HL, IMMU(1)); SC(1); Fza; } @@ -2125,7 +2126,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0x67: { /** 0110 0001 0110 0reg or %0, %1 */ -#line 960 "rl78-decode.opc" +#line 962 "rl78-decode.opc" int reg AU = op[1] & 0x07; if (trace) { @@ -2135,7 +2136,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" reg = 0x%x\n", reg); } SYNTAX("or %0, %1"); -#line 960 "rl78-decode.opc" +#line 962 "rl78-decode.opc" ID(or); DRB(reg); SR(A); Fz; } @@ -2149,7 +2150,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0x6f: { /** 0110 0001 0110 1rba or %0, %1 */ -#line 957 "rl78-decode.opc" +#line 959 "rl78-decode.opc" int rba AU = op[1] & 0x07; if (trace) { @@ -2159,7 +2160,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" rba = 0x%x\n", rba); } SYNTAX("or %0, %1"); -#line 957 "rl78-decode.opc" +#line 959 "rl78-decode.opc" ID(or); DR(A); SRB(rba); Fz; } @@ -2174,7 +2175,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0], op[1]); } SYNTAX("dec %ea0"); -#line 550 "rl78-decode.opc" +#line 551 "rl78-decode.opc" ID(sub); DM(HL, IMMU(1)); SC(1); Fza; } @@ -2189,7 +2190,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0x77: { /** 0110 0001 0111 0reg xor %0, %1 */ -#line 1264 "rl78-decode.opc" +#line 1266 "rl78-decode.opc" int reg AU = op[1] & 0x07; if (trace) { @@ -2199,7 +2200,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" reg = 0x%x\n", reg); } SYNTAX("xor %0, %1"); -#line 1264 "rl78-decode.opc" +#line 1266 "rl78-decode.opc" ID(xor); DRB(reg); SR(A); Fz; } @@ -2213,7 +2214,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0x7f: { /** 0110 0001 0111 1rba xor %0, %1 */ -#line 1261 "rl78-decode.opc" +#line 1263 "rl78-decode.opc" int rba AU = op[1] & 0x07; if (trace) { @@ -2223,7 +2224,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" rba = 0x%x\n", rba); } SYNTAX("xor %0, %1"); -#line 1261 "rl78-decode.opc" +#line 1263 "rl78-decode.opc" ID(xor); DR(A); SRB(rba); Fz; } @@ -2238,7 +2239,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0], op[1]); } SYNTAX("incw %ea0"); -#line 597 "rl78-decode.opc" +#line 598 "rl78-decode.opc" ID(add); W(); DM(HL, IMMU(1)); SC(1); } @@ -2254,7 +2255,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0], op[1]); } SYNTAX("add %0, %e1"); -#line 206 "rl78-decode.opc" +#line 207 "rl78-decode.opc" ID(add); DR(A); SM2(HL, B, 0); Fzac; } @@ -2269,7 +2270,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0], op[1]); } SYNTAX("add %0, %e1"); -#line 212 "rl78-decode.opc" +#line 213 "rl78-decode.opc" ID(add); DR(A); SM2(HL, C, 0); Fzac; } @@ -2308,9 +2309,9 @@ rl78_decode_opcode (unsigned long pc AU, case 0xf7: { /** 0110 0001 1nnn 01mm callt [%x0] */ -#line 432 "rl78-decode.opc" +#line 433 "rl78-decode.opc" int nnn AU = (op[1] >> 4) & 0x07; -#line 432 "rl78-decode.opc" +#line 433 "rl78-decode.opc" int mm AU = op[1] & 0x03; if (trace) { @@ -2321,7 +2322,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" mm = 0x%x\n", mm); } SYNTAX("callt [%x0]"); -#line 432 "rl78-decode.opc" +#line 433 "rl78-decode.opc" ID(call); DM(None, 0x80 + mm*16 + nnn*2); /*----------------------------------------------------------------------*/ @@ -2337,7 +2338,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0x8f: { /** 0110 0001 1000 1reg xch %0, %1 */ -#line 1223 "rl78-decode.opc" +#line 1225 "rl78-decode.opc" int reg AU = op[1] & 0x07; if (trace) { @@ -2347,7 +2348,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" reg = 0x%x\n", reg); } SYNTAX("xch %0, %1"); -#line 1223 "rl78-decode.opc" +#line 1225 "rl78-decode.opc" /* Note: DECW uses reg == X, so this must follow DECW */ ID(xch); DR(A); SRB(reg); @@ -2363,7 +2364,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0], op[1]); } SYNTAX("decw %ea0"); -#line 564 "rl78-decode.opc" +#line 565 "rl78-decode.opc" ID(sub); W(); DM(HL, IMMU(1)); SC(1); } @@ -2378,7 +2379,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0], op[1]); } SYNTAX("addc %0, %e1"); -#line 238 "rl78-decode.opc" +#line 239 "rl78-decode.opc" ID(addc); DR(A); SM2(HL, B, 0); Fzac; } @@ -2393,7 +2394,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0], op[1]); } SYNTAX("addc %0, %e1"); -#line 241 "rl78-decode.opc" +#line 242 "rl78-decode.opc" ID(addc); DR(A); SM2(HL, C, 0); Fzac; } @@ -2409,7 +2410,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0], op[1]); } SYNTAX("sub %0, %e1"); -#line 1124 "rl78-decode.opc" +#line 1126 "rl78-decode.opc" ID(sub); DR(A); SM2(HL, B, 0); Fzac; } @@ -2424,7 +2425,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0], op[1]); } SYNTAX("sub %0, %e1"); -#line 1130 "rl78-decode.opc" +#line 1132 "rl78-decode.opc" ID(sub); DR(A); SM2(HL, C, 0); Fzac; } @@ -2439,7 +2440,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0], op[1]); } SYNTAX("xch %0, %1"); -#line 1227 "rl78-decode.opc" +#line 1229 "rl78-decode.opc" ID(xch); DR(A); SM(None, SADDR); } @@ -2454,7 +2455,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0], op[1]); } SYNTAX("xch %0, %e1"); -#line 1220 "rl78-decode.opc" +#line 1222 "rl78-decode.opc" ID(xch); DR(A); SM2(HL, C, 0); } @@ -2469,7 +2470,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0], op[1]); } SYNTAX("xch %0, %e!1"); -#line 1202 "rl78-decode.opc" +#line 1204 "rl78-decode.opc" ID(xch); DR(A); SM(None, IMMU(2)); } @@ -2484,7 +2485,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0], op[1]); } SYNTAX("xch %0, %1"); -#line 1230 "rl78-decode.opc" +#line 1232 "rl78-decode.opc" ID(xch); DR(A); SM(None, SFR); } @@ -2499,22 +2500,22 @@ rl78_decode_opcode (unsigned long pc AU, op[0], op[1]); } SYNTAX("xch %0, %e1"); -#line 1211 "rl78-decode.opc" +#line 1213 "rl78-decode.opc" ID(xch); DR(A); SM(HL, 0); } break; case 0xad: { - /** 0110 0001 1010 1101 xch %0, %ea1 */ + /** 0110 0001 1010 1101 xch %0, %ea1 */ if (trace) { printf ("\033[33m%s\033[0m %02x %02x\n", - "/** 0110 0001 1010 1101 xch %0, %ea1 */", + "/** 0110 0001 1010 1101 xch %0, %ea1 */", op[0], op[1]); } SYNTAX("xch %0, %ea1"); -#line 1217 "rl78-decode.opc" +#line 1219 "rl78-decode.opc" ID(xch); DR(A); SM(HL, IMMU(1)); } @@ -2529,7 +2530,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0], op[1]); } SYNTAX("xch %0, %e1"); -#line 1205 "rl78-decode.opc" +#line 1207 "rl78-decode.opc" ID(xch); DR(A); SM(DE, 0); } @@ -2544,7 +2545,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0], op[1]); } SYNTAX("xch %0, %e1"); -#line 1208 "rl78-decode.opc" +#line 1210 "rl78-decode.opc" ID(xch); DR(A); SM(DE, IMMU(1)); } @@ -2559,7 +2560,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0], op[1]); } SYNTAX("subc %0, %e1"); -#line 1156 "rl78-decode.opc" +#line 1158 "rl78-decode.opc" ID(subc); DR(A); SM2(HL, B, 0); Fzac; } @@ -2574,7 +2575,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0], op[1]); } SYNTAX("subc %0, %e1"); -#line 1159 "rl78-decode.opc" +#line 1161 "rl78-decode.opc" ID(subc); DR(A); SM2(HL, C, 0); Fzac; } @@ -2589,7 +2590,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0], op[1]); } SYNTAX("mov %0, %1"); -#line 722 "rl78-decode.opc" +#line 723 "rl78-decode.opc" ID(mov); DR(ES); SM(None, SADDR); } @@ -2604,7 +2605,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0], op[1]); } SYNTAX("xch %0, %e1"); -#line 1214 "rl78-decode.opc" +#line 1216 "rl78-decode.opc" ID(xch); DR(A); SM2(HL, B, 0); } @@ -2619,7 +2620,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0], op[1]); } SYNTAX("cmp %0, %e1"); -#line 491 "rl78-decode.opc" +#line 492 "rl78-decode.opc" ID(cmp); DR(A); SM2(HL, B, 0); Fzac; } @@ -2634,7 +2635,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0], op[1]); } SYNTAX("cmp %0, %e1"); -#line 494 "rl78-decode.opc" +#line 495 "rl78-decode.opc" ID(cmp); DR(A); SM2(HL, C, 0); Fzac; } @@ -2649,7 +2650,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0], op[1]); } SYNTAX("bh $%a0"); -#line 339 "rl78-decode.opc" +#line 340 "rl78-decode.opc" ID(branch_cond); DC(pc+IMMS(1)+3); SR(None); COND(H); } @@ -2664,7 +2665,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0], op[1]); } SYNTAX("sk%c1"); -#line 1093 "rl78-decode.opc" +#line 1095 "rl78-decode.opc" ID(skip); COND(C); } @@ -2679,7 +2680,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0], op[1]); } SYNTAX("mov %0, %e1"); -#line 659 "rl78-decode.opc" +#line 660 "rl78-decode.opc" ID(mov); DR(A); SM2(HL, B, 0); } @@ -2690,7 +2691,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0xfa: { /** 0110 0001 11rg 1010 call %0 */ -#line 429 "rl78-decode.opc" +#line 430 "rl78-decode.opc" int rg AU = (op[1] >> 4) & 0x03; if (trace) { @@ -2700,7 +2701,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" rg = 0x%x\n", rg); } SYNTAX("call %0"); -#line 429 "rl78-decode.opc" +#line 430 "rl78-decode.opc" ID(call); DRW(rg); } @@ -2715,7 +2716,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0], op[1]); } SYNTAX("br ax"); -#line 379 "rl78-decode.opc" +#line 380 "rl78-decode.opc" ID(branch); DR(AX); /*----------------------------------------------------------------------*/ @@ -2732,7 +2733,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0], op[1]); } SYNTAX("brk"); -#line 387 "rl78-decode.opc" +#line 388 "rl78-decode.opc" ID(break); /*----------------------------------------------------------------------*/ @@ -2749,7 +2750,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0], op[1]); } SYNTAX("pop %s0"); -#line 988 "rl78-decode.opc" +#line 990 "rl78-decode.opc" ID(mov); W(); DR(PSW); SPOP(); /*----------------------------------------------------------------------*/ @@ -2758,15 +2759,15 @@ rl78_decode_opcode (unsigned long pc AU, break; case 0xce: { - /** 0110 0001 1100 1110 movs %ea0, %1 */ + /** 0110 0001 1100 1110 movs %ea0, %1 */ if (trace) { printf ("\033[33m%s\033[0m %02x %02x\n", - "/** 0110 0001 1100 1110 movs %ea0, %1 */", + "/** 0110 0001 1100 1110 movs %ea0, %1 */", op[0], op[1]); } SYNTAX("movs %ea0, %1"); -#line 810 "rl78-decode.opc" +#line 811 "rl78-decode.opc" ID(mov); DM(HL, IMMU(1)); SR(X); Fzc; /*----------------------------------------------------------------------*/ @@ -2779,7 +2780,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0xff: { /** 0110 0001 11rb 1111 sel rb%1 */ -#line 1040 "rl78-decode.opc" +#line 1042 "rl78-decode.opc" int rb AU = (op[1] >> 4) & 0x03; if (trace) { @@ -2789,7 +2790,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" rb = 0x%x\n", rb); } SYNTAX("sel rb%1"); -#line 1040 "rl78-decode.opc" +#line 1042 "rl78-decode.opc" ID(sel); SC(rb); /*----------------------------------------------------------------------*/ @@ -2806,7 +2807,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0], op[1]); } SYNTAX("and %0, %e1"); -#line 290 "rl78-decode.opc" +#line 291 "rl78-decode.opc" ID(and); DR(A); SM2(HL, B, 0); Fz; } @@ -2821,7 +2822,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0], op[1]); } SYNTAX("and %0, %e1"); -#line 296 "rl78-decode.opc" +#line 297 "rl78-decode.opc" ID(and); DR(A); SM2(HL, C, 0); Fz; } @@ -2836,7 +2837,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0], op[1]); } SYNTAX("bnh $%a0"); -#line 342 "rl78-decode.opc" +#line 343 "rl78-decode.opc" ID(branch_cond); DC(pc+IMMS(1)+3); SR(None); COND(NH); } @@ -2851,7 +2852,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0], op[1]); } SYNTAX("sk%c1"); -#line 1099 "rl78-decode.opc" +#line 1101 "rl78-decode.opc" ID(skip); COND(NC); } @@ -2866,7 +2867,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0], op[1]); } SYNTAX("mov %e0, %1"); -#line 626 "rl78-decode.opc" +#line 627 "rl78-decode.opc" ID(mov); DM2(HL, B, 0); SR(A); } @@ -2881,7 +2882,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0], op[1]); } SYNTAX("ror %0, %1"); -#line 1021 "rl78-decode.opc" +#line 1023 "rl78-decode.opc" ID(ror); DR(A); SC(1); } @@ -2896,7 +2897,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0], op[1]); } SYNTAX("rolc %0, %1"); -#line 1015 "rl78-decode.opc" +#line 1017 "rl78-decode.opc" ID(rolc); DR(A); SC(1); } @@ -2911,7 +2912,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0], op[1]); } SYNTAX("push %s1"); -#line 996 "rl78-decode.opc" +#line 998 "rl78-decode.opc" ID(mov); W(); DPUSH(); SR(PSW); /*----------------------------------------------------------------------*/ @@ -2920,15 +2921,15 @@ rl78_decode_opcode (unsigned long pc AU, break; case 0xde: { - /** 0110 0001 1101 1110 cmps %0, %ea1 */ + /** 0110 0001 1101 1110 cmps %0, %ea1 */ if (trace) { printf ("\033[33m%s\033[0m %02x %02x\n", - "/** 0110 0001 1101 1110 cmps %0, %ea1 */", + "/** 0110 0001 1101 1110 cmps %0, %ea1 */", op[0], op[1]); } SYNTAX("cmps %0, %ea1"); -#line 525 "rl78-decode.opc" +#line 526 "rl78-decode.opc" ID(cmp); DR(X); SM(HL, IMMU(1)); Fzac; /*----------------------------------------------------------------------*/ @@ -2945,7 +2946,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0], op[1]); } SYNTAX("or %0, %e1"); -#line 945 "rl78-decode.opc" +#line 947 "rl78-decode.opc" ID(or); DR(A); SM2(HL, B, 0); Fz; } @@ -2960,7 +2961,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0], op[1]); } SYNTAX("or %0, %e1"); -#line 951 "rl78-decode.opc" +#line 953 "rl78-decode.opc" ID(or); DR(A); SM2(HL, C, 0); Fz; } @@ -2975,7 +2976,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0], op[1]); } SYNTAX("sk%c1"); -#line 1096 "rl78-decode.opc" +#line 1098 "rl78-decode.opc" ID(skip); COND(H); } @@ -2990,7 +2991,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0], op[1]); } SYNTAX("sk%c1"); -#line 1108 "rl78-decode.opc" +#line 1110 "rl78-decode.opc" ID(skip); COND(Z); /*----------------------------------------------------------------------*/ @@ -3007,7 +3008,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0], op[1]); } SYNTAX("mov %0, %e1"); -#line 662 "rl78-decode.opc" +#line 663 "rl78-decode.opc" ID(mov); DR(A); SM2(HL, C, 0); } @@ -3022,7 +3023,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0], op[1]); } SYNTAX("rol %0, %1"); -#line 1012 "rl78-decode.opc" +#line 1014 "rl78-decode.opc" ID(rol); DR(A); SC(1); } @@ -3037,7 +3038,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0], op[1]); } SYNTAX("retb"); -#line 1007 "rl78-decode.opc" +#line 1009 "rl78-decode.opc" ID(reti); /*----------------------------------------------------------------------*/ @@ -3054,7 +3055,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0], op[1]); } SYNTAX("halt"); -#line 575 "rl78-decode.opc" +#line 576 "rl78-decode.opc" ID(halt); /*----------------------------------------------------------------------*/ @@ -3065,7 +3066,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0xfe: { /** 0110 0001 111r 1110 rolwc %0, %1 */ -#line 1018 "rl78-decode.opc" +#line 1020 "rl78-decode.opc" int r AU = (op[1] >> 4) & 0x01; if (trace) { @@ -3075,7 +3076,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" r = 0x%x\n", r); } SYNTAX("rolwc %0, %1"); -#line 1018 "rl78-decode.opc" +#line 1020 "rl78-decode.opc" ID(rolc); W(); DRW(r); SC(1); } @@ -3090,7 +3091,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0], op[1]); } SYNTAX("xor %0, %e1"); -#line 1249 "rl78-decode.opc" +#line 1251 "rl78-decode.opc" ID(xor); DR(A); SM2(HL, B, 0); Fz; } @@ -3105,7 +3106,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0], op[1]); } SYNTAX("xor %0, %e1"); -#line 1255 "rl78-decode.opc" +#line 1257 "rl78-decode.opc" ID(xor); DR(A); SM2(HL, C, 0); Fz; } @@ -3120,7 +3121,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0], op[1]); } SYNTAX("sk%c1"); -#line 1102 "rl78-decode.opc" +#line 1104 "rl78-decode.opc" ID(skip); COND(NH); } @@ -3135,7 +3136,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0], op[1]); } SYNTAX("sk%c1"); -#line 1105 "rl78-decode.opc" +#line 1107 "rl78-decode.opc" ID(skip); COND(NZ); } @@ -3150,7 +3151,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0], op[1]); } SYNTAX("mov %e0, %1"); -#line 635 "rl78-decode.opc" +#line 636 "rl78-decode.opc" ID(mov); DM2(HL, C, 0); SR(A); } @@ -3165,7 +3166,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0], op[1]); } SYNTAX("rorc %0, %1"); -#line 1024 "rl78-decode.opc" +#line 1026 "rl78-decode.opc" ID(rorc); DR(A); SC(1); /*----------------------------------------------------------------------*/ @@ -3185,7 +3186,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0], op[1]); } SYNTAX("reti"); -#line 1004 "rl78-decode.opc" +#line 1006 "rl78-decode.opc" ID(reti); } @@ -3200,7 +3201,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0], op[1]); } SYNTAX("stop"); -#line 1113 "rl78-decode.opc" +#line 1115 "rl78-decode.opc" ID(stop); /*----------------------------------------------------------------------*/ @@ -3220,7 +3221,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("movw %e0, %1"); -#line 873 "rl78-decode.opc" +#line 874 "rl78-decode.opc" ID(mov); W(); DM(C, IMMU(2)); SR(AX); } @@ -3235,7 +3236,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("movw %0, %e1"); -#line 864 "rl78-decode.opc" +#line 865 "rl78-decode.opc" ID(mov); W(); DR(AX); SM(C, IMMU(2)); } @@ -3250,7 +3251,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("or %0, #%1"); -#line 966 "rl78-decode.opc" +#line 968 "rl78-decode.opc" ID(or); DM(None, SADDR); SC(IMMU(1)); Fz; /*----------------------------------------------------------------------*/ @@ -3267,7 +3268,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("or %0, %1"); -#line 963 "rl78-decode.opc" +#line 965 "rl78-decode.opc" ID(or); DR(A); SM(None, SADDR); Fz; } @@ -3282,7 +3283,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("or %0, #%1"); -#line 954 "rl78-decode.opc" +#line 956 "rl78-decode.opc" ID(or); DR(A); SC(IMMU(1)); Fz; } @@ -3297,22 +3298,22 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("or %0, %e1"); -#line 942 "rl78-decode.opc" +#line 944 "rl78-decode.opc" ID(or); DR(A); SM(HL, 0); Fz; } break; case 0x6e: { - /** 0110 1110 or %0, %ea1 */ + /** 0110 1110 or %0, %ea1 */ if (trace) { printf ("\033[33m%s\033[0m %02x\n", - "/** 0110 1110 or %0, %ea1 */", + "/** 0110 1110 or %0, %ea1 */", op[0]); } SYNTAX("or %0, %ea1"); -#line 948 "rl78-decode.opc" +#line 950 "rl78-decode.opc" ID(or); DR(A); SM(HL, IMMU(1)); Fz; } @@ -3327,7 +3328,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("or %0, %e!1"); -#line 939 "rl78-decode.opc" +#line 941 "rl78-decode.opc" ID(or); DR(A); SM(None, IMMU(2)); Fz; } @@ -3341,7 +3342,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0x77: { /** 0111 0rba mov %0, %1 */ -#line 695 "rl78-decode.opc" +#line 696 "rl78-decode.opc" int rba AU = op[0] & 0x07; if (trace) { @@ -3351,7 +3352,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" rba = 0x%x\n", rba); } SYNTAX("mov %0, %1"); -#line 695 "rl78-decode.opc" +#line 696 "rl78-decode.opc" ID(mov); DRB(rba); SR(A); } @@ -3370,7 +3371,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0x70: { /** 0111 0001 0bit 0000 set1 %e!0 */ -#line 1045 "rl78-decode.opc" +#line 1047 "rl78-decode.opc" int bit AU = (op[1] >> 4) & 0x07; if (trace) { @@ -3380,7 +3381,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" bit = 0x%x\n", bit); } SYNTAX("set1 %e!0"); -#line 1045 "rl78-decode.opc" +#line 1047 "rl78-decode.opc" ID(mov); DM(None, IMMU(2)); DB(bit); SC(1); } @@ -3395,7 +3396,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0x71: { /** 0111 0001 0bit 0001 mov1 %0, cy */ -#line 802 "rl78-decode.opc" +#line 803 "rl78-decode.opc" int bit AU = (op[1] >> 4) & 0x07; if (trace) { @@ -3405,7 +3406,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" bit = 0x%x\n", bit); } SYNTAX("mov1 %0, cy"); -#line 802 "rl78-decode.opc" +#line 803 "rl78-decode.opc" ID(mov); DM(None, SADDR); DB(bit); SCY(); } @@ -3420,7 +3421,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0x72: { /** 0111 0001 0bit 0010 set1 %0 */ -#line 1063 "rl78-decode.opc" +#line 1065 "rl78-decode.opc" int bit AU = (op[1] >> 4) & 0x07; if (trace) { @@ -3430,7 +3431,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" bit = 0x%x\n", bit); } SYNTAX("set1 %0"); -#line 1063 "rl78-decode.opc" +#line 1065 "rl78-decode.opc" ID(mov); DM(None, SADDR); DB(bit); SC(1); /*----------------------------------------------------------------------*/ @@ -3447,7 +3448,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0x73: { /** 0111 0001 0bit 0011 clr1 %0 */ -#line 455 "rl78-decode.opc" +#line 456 "rl78-decode.opc" int bit AU = (op[1] >> 4) & 0x07; if (trace) { @@ -3457,7 +3458,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" bit = 0x%x\n", bit); } SYNTAX("clr1 %0"); -#line 455 "rl78-decode.opc" +#line 456 "rl78-decode.opc" ID(mov); DM(None, SADDR); DB(bit); SC(0); /*----------------------------------------------------------------------*/ @@ -3474,7 +3475,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0x74: { /** 0111 0001 0bit 0100 mov1 cy, %1 */ -#line 796 "rl78-decode.opc" +#line 797 "rl78-decode.opc" int bit AU = (op[1] >> 4) & 0x07; if (trace) { @@ -3484,7 +3485,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" bit = 0x%x\n", bit); } SYNTAX("mov1 cy, %1"); -#line 796 "rl78-decode.opc" +#line 797 "rl78-decode.opc" ID(mov); DCY(); SM(None, SADDR); SB(bit); } @@ -3499,7 +3500,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0x75: { /** 0111 0001 0bit 0101 and1 cy, %s1 */ -#line 325 "rl78-decode.opc" +#line 326 "rl78-decode.opc" int bit AU = (op[1] >> 4) & 0x07; if (trace) { @@ -3509,7 +3510,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" bit = 0x%x\n", bit); } SYNTAX("and1 cy, %s1"); -#line 325 "rl78-decode.opc" +#line 326 "rl78-decode.opc" ID(and); DCY(); SM(None, SADDR); SB(bit); /*----------------------------------------------------------------------*/ @@ -3529,7 +3530,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0x76: { /** 0111 0001 0bit 0110 or1 cy, %s1 */ -#line 980 "rl78-decode.opc" +#line 982 "rl78-decode.opc" int bit AU = (op[1] >> 4) & 0x07; if (trace) { @@ -3539,7 +3540,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" bit = 0x%x\n", bit); } SYNTAX("or1 cy, %s1"); -#line 980 "rl78-decode.opc" +#line 982 "rl78-decode.opc" ID(or); DCY(); SM(None, SADDR); SB(bit); /*----------------------------------------------------------------------*/ @@ -3556,7 +3557,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0x77: { /** 0111 0001 0bit 0111 xor1 cy, %s1 */ -#line 1284 "rl78-decode.opc" +#line 1286 "rl78-decode.opc" int bit AU = (op[1] >> 4) & 0x07; if (trace) { @@ -3566,7 +3567,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" bit = 0x%x\n", bit); } SYNTAX("xor1 cy, %s1"); -#line 1284 "rl78-decode.opc" +#line 1286 "rl78-decode.opc" ID(xor); DCY(); SM(None, SADDR); SB(bit); /*----------------------------------------------------------------------*/ @@ -3583,7 +3584,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0x78: { /** 0111 0001 0bit 1000 clr1 %e!0 */ -#line 437 "rl78-decode.opc" +#line 438 "rl78-decode.opc" int bit AU = (op[1] >> 4) & 0x07; if (trace) { @@ -3593,7 +3594,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" bit = 0x%x\n", bit); } SYNTAX("clr1 %e!0"); -#line 437 "rl78-decode.opc" +#line 438 "rl78-decode.opc" ID(mov); DM(None, IMMU(2)); DB(bit); SC(0); } @@ -3608,7 +3609,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0x79: { /** 0111 0001 0bit 1001 mov1 %s0, cy */ -#line 805 "rl78-decode.opc" +#line 806 "rl78-decode.opc" int bit AU = (op[1] >> 4) & 0x07; if (trace) { @@ -3618,7 +3619,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" bit = 0x%x\n", bit); } SYNTAX("mov1 %s0, cy"); -#line 805 "rl78-decode.opc" +#line 806 "rl78-decode.opc" ID(mov); DM(None, SFR); DB(bit); SCY(); /*----------------------------------------------------------------------*/ @@ -3635,7 +3636,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0x7a: { /** 0111 0001 0bit 1010 set1 %s0 */ -#line 1057 "rl78-decode.opc" +#line 1059 "rl78-decode.opc" int bit AU = (op[1] >> 4) & 0x07; if (trace) { @@ -3645,7 +3646,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" bit = 0x%x\n", bit); } SYNTAX("set1 %s0"); -#line 1057 "rl78-decode.opc" +#line 1059 "rl78-decode.opc" op0 = SFR; ID(mov); DM(None, op0); DB(bit); SC(1); if (op0 == RL78_SFR_PSW && bit == 7) @@ -3663,7 +3664,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0x7b: { /** 0111 0001 0bit 1011 clr1 %s0 */ -#line 449 "rl78-decode.opc" +#line 450 "rl78-decode.opc" int bit AU = (op[1] >> 4) & 0x07; if (trace) { @@ -3673,7 +3674,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" bit = 0x%x\n", bit); } SYNTAX("clr1 %s0"); -#line 449 "rl78-decode.opc" +#line 450 "rl78-decode.opc" op0 = SFR; ID(mov); DM(None, op0); DB(bit); SC(0); if (op0 == RL78_SFR_PSW && bit == 7) @@ -3691,7 +3692,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0x7c: { /** 0111 0001 0bit 1100 mov1 cy, %s1 */ -#line 799 "rl78-decode.opc" +#line 800 "rl78-decode.opc" int bit AU = (op[1] >> 4) & 0x07; if (trace) { @@ -3701,7 +3702,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" bit = 0x%x\n", bit); } SYNTAX("mov1 cy, %s1"); -#line 799 "rl78-decode.opc" +#line 800 "rl78-decode.opc" ID(mov); DCY(); SM(None, SFR); SB(bit); } @@ -3716,7 +3717,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0x7d: { /** 0111 0001 0bit 1101 and1 cy, %s1 */ -#line 322 "rl78-decode.opc" +#line 323 "rl78-decode.opc" int bit AU = (op[1] >> 4) & 0x07; if (trace) { @@ -3726,7 +3727,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" bit = 0x%x\n", bit); } SYNTAX("and1 cy, %s1"); -#line 322 "rl78-decode.opc" +#line 323 "rl78-decode.opc" ID(and); DCY(); SM(None, SFR); SB(bit); } @@ -3741,7 +3742,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0x7e: { /** 0111 0001 0bit 1110 or1 cy, %s1 */ -#line 977 "rl78-decode.opc" +#line 979 "rl78-decode.opc" int bit AU = (op[1] >> 4) & 0x07; if (trace) { @@ -3751,7 +3752,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" bit = 0x%x\n", bit); } SYNTAX("or1 cy, %s1"); -#line 977 "rl78-decode.opc" +#line 979 "rl78-decode.opc" ID(or); DCY(); SM(None, SFR); SB(bit); } @@ -3766,7 +3767,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0x7f: { /** 0111 0001 0bit 1111 xor1 cy, %s1 */ -#line 1281 "rl78-decode.opc" +#line 1283 "rl78-decode.opc" int bit AU = (op[1] >> 4) & 0x07; if (trace) { @@ -3776,7 +3777,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" bit = 0x%x\n", bit); } SYNTAX("xor1 cy, %s1"); -#line 1281 "rl78-decode.opc" +#line 1283 "rl78-decode.opc" ID(xor); DCY(); SM(None, SFR); SB(bit); } @@ -3791,7 +3792,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0], op[1]); } SYNTAX("set1 cy"); -#line 1054 "rl78-decode.opc" +#line 1056 "rl78-decode.opc" ID(mov); DCY(); SC(1); } @@ -3806,7 +3807,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0xf1: { /** 0111 0001 1bit 0001 mov1 %e0, cy */ -#line 784 "rl78-decode.opc" +#line 785 "rl78-decode.opc" int bit AU = (op[1] >> 4) & 0x07; if (trace) { @@ -3816,7 +3817,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" bit = 0x%x\n", bit); } SYNTAX("mov1 %e0, cy"); -#line 784 "rl78-decode.opc" +#line 785 "rl78-decode.opc" ID(mov); DM(HL, 0); DB(bit); SCY(); } @@ -3831,7 +3832,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0xf2: { /** 0111 0001 1bit 0010 set1 %e0 */ -#line 1048 "rl78-decode.opc" +#line 1050 "rl78-decode.opc" int bit AU = (op[1] >> 4) & 0x07; if (trace) { @@ -3841,7 +3842,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" bit = 0x%x\n", bit); } SYNTAX("set1 %e0"); -#line 1048 "rl78-decode.opc" +#line 1050 "rl78-decode.opc" ID(mov); DM(HL, 0); DB(bit); SC(1); } @@ -3856,7 +3857,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0xf3: { /** 0111 0001 1bit 0011 clr1 %e0 */ -#line 440 "rl78-decode.opc" +#line 441 "rl78-decode.opc" int bit AU = (op[1] >> 4) & 0x07; if (trace) { @@ -3866,7 +3867,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" bit = 0x%x\n", bit); } SYNTAX("clr1 %e0"); -#line 440 "rl78-decode.opc" +#line 441 "rl78-decode.opc" ID(mov); DM(HL, 0); DB(bit); SC(0); } @@ -3881,7 +3882,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0xf4: { /** 0111 0001 1bit 0100 mov1 cy, %e1 */ -#line 790 "rl78-decode.opc" +#line 791 "rl78-decode.opc" int bit AU = (op[1] >> 4) & 0x07; if (trace) { @@ -3891,7 +3892,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" bit = 0x%x\n", bit); } SYNTAX("mov1 cy, %e1"); -#line 790 "rl78-decode.opc" +#line 791 "rl78-decode.opc" ID(mov); DCY(); SM(HL, 0); SB(bit); } @@ -3906,7 +3907,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0xf5: { /** 0111 0001 1bit 0101 and1 cy, %e1 */ -#line 316 "rl78-decode.opc" +#line 317 "rl78-decode.opc" int bit AU = (op[1] >> 4) & 0x07; if (trace) { @@ -3916,7 +3917,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" bit = 0x%x\n", bit); } SYNTAX("and1 cy, %e1"); -#line 316 "rl78-decode.opc" +#line 317 "rl78-decode.opc" ID(and); DCY(); SM(HL, 0); SB(bit); } @@ -3931,7 +3932,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0xf6: { /** 0111 0001 1bit 0110 or1 cy, %e1 */ -#line 971 "rl78-decode.opc" +#line 973 "rl78-decode.opc" int bit AU = (op[1] >> 4) & 0x07; if (trace) { @@ -3941,7 +3942,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" bit = 0x%x\n", bit); } SYNTAX("or1 cy, %e1"); -#line 971 "rl78-decode.opc" +#line 973 "rl78-decode.opc" ID(or); DCY(); SM(HL, 0); SB(bit); } @@ -3956,7 +3957,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0xf7: { /** 0111 0001 1bit 0111 xor1 cy, %e1 */ -#line 1275 "rl78-decode.opc" +#line 1277 "rl78-decode.opc" int bit AU = (op[1] >> 4) & 0x07; if (trace) { @@ -3966,7 +3967,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" bit = 0x%x\n", bit); } SYNTAX("xor1 cy, %e1"); -#line 1275 "rl78-decode.opc" +#line 1277 "rl78-decode.opc" ID(xor); DCY(); SM(HL, 0); SB(bit); } @@ -3981,7 +3982,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0], op[1]); } SYNTAX("clr1 cy"); -#line 446 "rl78-decode.opc" +#line 447 "rl78-decode.opc" ID(mov); DCY(); SC(0); } @@ -3996,7 +3997,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0xf9: { /** 0111 0001 1bit 1001 mov1 %e0, cy */ -#line 787 "rl78-decode.opc" +#line 788 "rl78-decode.opc" int bit AU = (op[1] >> 4) & 0x07; if (trace) { @@ -4006,7 +4007,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" bit = 0x%x\n", bit); } SYNTAX("mov1 %e0, cy"); -#line 787 "rl78-decode.opc" +#line 788 "rl78-decode.opc" ID(mov); DR(A); DB(bit); SCY(); } @@ -4021,7 +4022,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0xfa: { /** 0111 0001 1bit 1010 set1 %0 */ -#line 1051 "rl78-decode.opc" +#line 1053 "rl78-decode.opc" int bit AU = (op[1] >> 4) & 0x07; if (trace) { @@ -4031,7 +4032,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" bit = 0x%x\n", bit); } SYNTAX("set1 %0"); -#line 1051 "rl78-decode.opc" +#line 1053 "rl78-decode.opc" ID(mov); DR(A); DB(bit); SC(1); } @@ -4046,7 +4047,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0xfb: { /** 0111 0001 1bit 1011 clr1 %0 */ -#line 443 "rl78-decode.opc" +#line 444 "rl78-decode.opc" int bit AU = (op[1] >> 4) & 0x07; if (trace) { @@ -4056,7 +4057,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" bit = 0x%x\n", bit); } SYNTAX("clr1 %0"); -#line 443 "rl78-decode.opc" +#line 444 "rl78-decode.opc" ID(mov); DR(A); DB(bit); SC(0); } @@ -4071,7 +4072,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0xfc: { /** 0111 0001 1bit 1100 mov1 cy, %e1 */ -#line 793 "rl78-decode.opc" +#line 794 "rl78-decode.opc" int bit AU = (op[1] >> 4) & 0x07; if (trace) { @@ -4081,7 +4082,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" bit = 0x%x\n", bit); } SYNTAX("mov1 cy, %e1"); -#line 793 "rl78-decode.opc" +#line 794 "rl78-decode.opc" ID(mov); DCY(); SR(A); SB(bit); } @@ -4096,7 +4097,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0xfd: { /** 0111 0001 1bit 1101 and1 cy, %1 */ -#line 319 "rl78-decode.opc" +#line 320 "rl78-decode.opc" int bit AU = (op[1] >> 4) & 0x07; if (trace) { @@ -4106,7 +4107,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" bit = 0x%x\n", bit); } SYNTAX("and1 cy, %1"); -#line 319 "rl78-decode.opc" +#line 320 "rl78-decode.opc" ID(and); DCY(); SR(A); SB(bit); } @@ -4121,7 +4122,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0xfe: { /** 0111 0001 1bit 1110 or1 cy, %1 */ -#line 974 "rl78-decode.opc" +#line 976 "rl78-decode.opc" int bit AU = (op[1] >> 4) & 0x07; if (trace) { @@ -4131,7 +4132,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" bit = 0x%x\n", bit); } SYNTAX("or1 cy, %1"); -#line 974 "rl78-decode.opc" +#line 976 "rl78-decode.opc" ID(or); DCY(); SR(A); SB(bit); } @@ -4146,7 +4147,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0xff: { /** 0111 0001 1bit 1111 xor1 cy, %1 */ -#line 1278 "rl78-decode.opc" +#line 1280 "rl78-decode.opc" int bit AU = (op[1] >> 4) & 0x07; if (trace) { @@ -4156,7 +4157,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" bit = 0x%x\n", bit); } SYNTAX("xor1 cy, %1"); -#line 1278 "rl78-decode.opc" +#line 1280 "rl78-decode.opc" ID(xor); DCY(); SR(A); SB(bit); } @@ -4171,7 +4172,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0], op[1]); } SYNTAX("not1 cy"); -#line 915 "rl78-decode.opc" +#line 917 "rl78-decode.opc" ID(xor); DCY(); SC(1); /*----------------------------------------------------------------------*/ @@ -4191,7 +4192,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("movw %e0, %1"); -#line 876 "rl78-decode.opc" +#line 877 "rl78-decode.opc" ID(mov); W(); DM(BC, IMMU(2)); SR(AX); } @@ -4206,7 +4207,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("movw %0, %e1"); -#line 867 "rl78-decode.opc" +#line 868 "rl78-decode.opc" ID(mov); W(); DR(AX); SM(BC, IMMU(2)); } @@ -4221,7 +4222,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("xor %0, #%1"); -#line 1270 "rl78-decode.opc" +#line 1272 "rl78-decode.opc" ID(xor); DM(None, SADDR); SC(IMMU(1)); Fz; /*----------------------------------------------------------------------*/ @@ -4238,7 +4239,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("xor %0, %1"); -#line 1267 "rl78-decode.opc" +#line 1269 "rl78-decode.opc" ID(xor); DR(A); SM(None, SADDR); Fz; } @@ -4253,7 +4254,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("xor %0, #%1"); -#line 1258 "rl78-decode.opc" +#line 1260 "rl78-decode.opc" ID(xor); DR(A); SC(IMMU(1)); Fz; } @@ -4268,22 +4269,22 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("xor %0, %e1"); -#line 1246 "rl78-decode.opc" +#line 1248 "rl78-decode.opc" ID(xor); DR(A); SM(HL, 0); Fz; } break; case 0x7e: { - /** 0111 1110 xor %0, %ea1 */ + /** 0111 1110 xor %0, %ea1 */ if (trace) { printf ("\033[33m%s\033[0m %02x\n", - "/** 0111 1110 xor %0, %ea1 */", + "/** 0111 1110 xor %0, %ea1 */", op[0]); } SYNTAX("xor %0, %ea1"); -#line 1252 "rl78-decode.opc" +#line 1254 "rl78-decode.opc" ID(xor); DR(A); SM(HL, IMMU(1)); Fz; } @@ -4298,7 +4299,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("xor %0, %e!1"); -#line 1243 "rl78-decode.opc" +#line 1245 "rl78-decode.opc" ID(xor); DR(A); SM(None, IMMU(2)); Fz; } @@ -4313,7 +4314,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0x87: { /** 1000 0reg inc %0 */ -#line 586 "rl78-decode.opc" +#line 587 "rl78-decode.opc" int reg AU = op[0] & 0x07; if (trace) { @@ -4323,7 +4324,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" reg = 0x%x\n", reg); } SYNTAX("inc %0"); -#line 586 "rl78-decode.opc" +#line 587 "rl78-decode.opc" ID(add); DRB(reg); SC(1); Fza; } @@ -4338,7 +4339,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("mov %0, %e1"); -#line 665 "rl78-decode.opc" +#line 666 "rl78-decode.opc" ID(mov); DR(A); SM(SP, IMMU(1)); } @@ -4353,7 +4354,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("mov %0, %e1"); -#line 647 "rl78-decode.opc" +#line 648 "rl78-decode.opc" ID(mov); DR(A); SM(DE, 0); } @@ -4368,7 +4369,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("mov %0, %e1"); -#line 650 "rl78-decode.opc" +#line 651 "rl78-decode.opc" ID(mov); DR(A); SM(DE, IMMU(1)); } @@ -4383,22 +4384,22 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("mov %0, %e1"); -#line 653 "rl78-decode.opc" +#line 654 "rl78-decode.opc" ID(mov); DR(A); SM(HL, 0); } break; case 0x8c: { - /** 1000 1100 mov %0, %ea1 */ + /** 1000 1100 mov %0, %ea1 */ if (trace) { printf ("\033[33m%s\033[0m %02x\n", - "/** 1000 1100 mov %0, %ea1 */", + "/** 1000 1100 mov %0, %ea1 */", op[0]); } SYNTAX("mov %0, %ea1"); -#line 656 "rl78-decode.opc" +#line 657 "rl78-decode.opc" ID(mov); DR(A); SM(HL, IMMU(1)); } @@ -4413,7 +4414,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("mov %0, %1"); -#line 689 "rl78-decode.opc" +#line 690 "rl78-decode.opc" ID(mov); DR(A); SM(None, SADDR); } @@ -4428,7 +4429,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("mov %0, %s1"); -#line 686 "rl78-decode.opc" +#line 687 "rl78-decode.opc" ID(mov); DR(A); SM(None, SFR); } @@ -4443,7 +4444,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("mov %0, %e!1"); -#line 644 "rl78-decode.opc" +#line 645 "rl78-decode.opc" ID(mov); DR(A); SM(None, IMMU(2)); } @@ -4458,7 +4459,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0x97: { /** 1001 0reg dec %0 */ -#line 553 "rl78-decode.opc" +#line 554 "rl78-decode.opc" int reg AU = op[0] & 0x07; if (trace) { @@ -4468,7 +4469,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" reg = 0x%x\n", reg); } SYNTAX("dec %0"); -#line 553 "rl78-decode.opc" +#line 554 "rl78-decode.opc" ID(sub); DRB(reg); SC(1); Fza; } @@ -4483,7 +4484,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("mov %0, %1"); -#line 641 "rl78-decode.opc" +#line 642 "rl78-decode.opc" ID(mov); DM(SP, IMMU(1)); SR(A); } @@ -4498,7 +4499,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("mov %e0, %1"); -#line 614 "rl78-decode.opc" +#line 615 "rl78-decode.opc" ID(mov); DM(DE, 0); SR(A); } @@ -4513,7 +4514,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("mov %e0, %1"); -#line 620 "rl78-decode.opc" +#line 621 "rl78-decode.opc" ID(mov); DM(DE, IMMU(1)); SR(A); } @@ -4528,22 +4529,22 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("mov %e0, %1"); -#line 623 "rl78-decode.opc" +#line 624 "rl78-decode.opc" ID(mov); DM(HL, 0); SR(A); } break; case 0x9c: { - /** 1001 1100 mov %ea0, %1 */ + /** 1001 1100 mov %ea0, %1 */ if (trace) { printf ("\033[33m%s\033[0m %02x\n", - "/** 1001 1100 mov %ea0, %1 */", + "/** 1001 1100 mov %ea0, %1 */", op[0]); } SYNTAX("mov %ea0, %1"); -#line 632 "rl78-decode.opc" +#line 633 "rl78-decode.opc" ID(mov); DM(HL, IMMU(1)); SR(A); } @@ -4558,7 +4559,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("mov %0, %1"); -#line 746 "rl78-decode.opc" +#line 747 "rl78-decode.opc" ID(mov); DM(None, SADDR); SR(A); } @@ -4573,7 +4574,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("mov %0, %1"); -#line 779 "rl78-decode.opc" +#line 780 "rl78-decode.opc" ID(mov); DM(None, SFR); SR(A); /*----------------------------------------------------------------------*/ @@ -4590,7 +4591,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("mov %e!0, %1"); -#line 611 "rl78-decode.opc" +#line 612 "rl78-decode.opc" ID(mov); DM(None, IMMU(2)); SR(A); } @@ -4605,7 +4606,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("inc %e!0"); -#line 580 "rl78-decode.opc" +#line 581 "rl78-decode.opc" ID(add); DM(None, IMMU(2)); SC(1); Fza; } @@ -4616,7 +4617,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0xa7: { /** 1010 0rg1 incw %0 */ -#line 600 "rl78-decode.opc" +#line 601 "rl78-decode.opc" int rg AU = (op[0] >> 1) & 0x03; if (trace) { @@ -4626,7 +4627,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" rg = 0x%x\n", rg); } SYNTAX("incw %0"); -#line 600 "rl78-decode.opc" +#line 601 "rl78-decode.opc" ID(add); W(); DRW(rg); SC(1); } @@ -4641,7 +4642,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("incw %e!0"); -#line 594 "rl78-decode.opc" +#line 595 "rl78-decode.opc" ID(add); W(); DM(None, IMMU(2)); SC(1); } @@ -4656,7 +4657,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("inc %0"); -#line 589 "rl78-decode.opc" +#line 590 "rl78-decode.opc" ID(add); DM(None, SADDR); SC(1); Fza; /*----------------------------------------------------------------------*/ @@ -4673,7 +4674,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("incw %0"); -#line 603 "rl78-decode.opc" +#line 604 "rl78-decode.opc" ID(add); W(); DM(None, SADDR); SC(1); /*----------------------------------------------------------------------*/ @@ -4690,7 +4691,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("movw %0, %1"); -#line 849 "rl78-decode.opc" +#line 850 "rl78-decode.opc" ID(mov); W(); DR(AX); SM(SP, IMMU(1)); } @@ -4705,7 +4706,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("movw %0, %e1"); -#line 837 "rl78-decode.opc" +#line 838 "rl78-decode.opc" ID(mov); W(); DR(AX); SM(DE, 0); } @@ -4720,7 +4721,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("movw %0, %e1"); -#line 840 "rl78-decode.opc" +#line 841 "rl78-decode.opc" ID(mov); W(); DR(AX); SM(DE, IMMU(1)); } @@ -4735,22 +4736,22 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("movw %0, %e1"); -#line 843 "rl78-decode.opc" +#line 844 "rl78-decode.opc" ID(mov); W(); DR(AX); SM(HL, 0); } break; case 0xac: { - /** 1010 1100 movw %0, %ea1 */ + /** 1010 1100 movw %0, %ea1 */ if (trace) { printf ("\033[33m%s\033[0m %02x\n", - "/** 1010 1100 movw %0, %ea1 */", + "/** 1010 1100 movw %0, %ea1 */", op[0]); } SYNTAX("movw %0, %ea1"); -#line 846 "rl78-decode.opc" +#line 847 "rl78-decode.opc" ID(mov); W(); DR(AX); SM(HL, IMMU(1)); } @@ -4765,7 +4766,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("movw %0, %1"); -#line 879 "rl78-decode.opc" +#line 880 "rl78-decode.opc" ID(mov); W(); DR(AX); SM(None, SADDR); } @@ -4780,7 +4781,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("movw %0, %s1"); -#line 882 "rl78-decode.opc" +#line 883 "rl78-decode.opc" ID(mov); W(); DR(AX); SM(None, SFR); } @@ -4795,7 +4796,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("movw %0, %e!1"); -#line 833 "rl78-decode.opc" +#line 834 "rl78-decode.opc" ID(mov); W(); DR(AX); SM(None, IMMU(2)); @@ -4811,7 +4812,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("dec %e!0"); -#line 547 "rl78-decode.opc" +#line 548 "rl78-decode.opc" ID(sub); DM(None, IMMU(2)); SC(1); Fza; } @@ -4822,7 +4823,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0xb7: { /** 1011 0rg1 decw %0 */ -#line 567 "rl78-decode.opc" +#line 568 "rl78-decode.opc" int rg AU = (op[0] >> 1) & 0x03; if (trace) { @@ -4832,7 +4833,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" rg = 0x%x\n", rg); } SYNTAX("decw %0"); -#line 567 "rl78-decode.opc" +#line 568 "rl78-decode.opc" ID(sub); W(); DRW(rg); SC(1); } @@ -4847,7 +4848,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("decw %e!0"); -#line 561 "rl78-decode.opc" +#line 562 "rl78-decode.opc" ID(sub); W(); DM(None, IMMU(2)); SC(1); } @@ -4862,7 +4863,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("dec %0"); -#line 556 "rl78-decode.opc" +#line 557 "rl78-decode.opc" ID(sub); DM(None, SADDR); SC(1); Fza; /*----------------------------------------------------------------------*/ @@ -4879,7 +4880,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("decw %0"); -#line 570 "rl78-decode.opc" +#line 571 "rl78-decode.opc" ID(sub); W(); DM(None, SADDR); SC(1); /*----------------------------------------------------------------------*/ @@ -4896,7 +4897,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("movw %0, %1"); -#line 830 "rl78-decode.opc" +#line 831 "rl78-decode.opc" ID(mov); W(); DM(SP, IMMU(1)); SR(AX); } @@ -4911,7 +4912,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("movw %e0, %1"); -#line 818 "rl78-decode.opc" +#line 819 "rl78-decode.opc" ID(mov); W(); DM(DE, 0); SR(AX); } @@ -4926,7 +4927,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("movw %e0, %1"); -#line 821 "rl78-decode.opc" +#line 822 "rl78-decode.opc" ID(mov); W(); DM(DE, IMMU(1)); SR(AX); } @@ -4941,22 +4942,22 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("movw %e0, %1"); -#line 824 "rl78-decode.opc" +#line 825 "rl78-decode.opc" ID(mov); W(); DM(HL, 0); SR(AX); } break; case 0xbc: { - /** 1011 1100 movw %ea0, %1 */ + /** 1011 1100 movw %ea0, %1 */ if (trace) { printf ("\033[33m%s\033[0m %02x\n", - "/** 1011 1100 movw %ea0, %1 */", + "/** 1011 1100 movw %ea0, %1 */", op[0]); } SYNTAX("movw %ea0, %1"); -#line 827 "rl78-decode.opc" +#line 828 "rl78-decode.opc" ID(mov); W(); DM(HL, IMMU(1)); SR(AX); } @@ -4971,7 +4972,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("movw %0, %1"); -#line 894 "rl78-decode.opc" +#line 895 "rl78-decode.opc" ID(mov); W(); DM(None, SADDR); SR(AX); } @@ -4986,7 +4987,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("movw %0, %1"); -#line 900 "rl78-decode.opc" +#line 901 "rl78-decode.opc" ID(mov); W(); DM(None, SFR); SR(AX); /*----------------------------------------------------------------------*/ @@ -5003,7 +5004,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("movw %e!0, %1"); -#line 815 "rl78-decode.opc" +#line 816 "rl78-decode.opc" ID(mov); W(); DM(None, IMMU(2)); SR(AX); } @@ -5014,7 +5015,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0xc6: { /** 1100 0rg0 pop %0 */ -#line 985 "rl78-decode.opc" +#line 987 "rl78-decode.opc" int rg AU = (op[0] >> 1) & 0x03; if (trace) { @@ -5024,7 +5025,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" rg = 0x%x\n", rg); } SYNTAX("pop %0"); -#line 985 "rl78-decode.opc" +#line 987 "rl78-decode.opc" ID(mov); W(); DRW(rg); SPOP(); } @@ -5035,7 +5036,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0xc7: { /** 1100 0rg1 push %1 */ -#line 993 "rl78-decode.opc" +#line 995 "rl78-decode.opc" int rg AU = (op[0] >> 1) & 0x03; if (trace) { @@ -5045,7 +5046,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" rg = 0x%x\n", rg); } SYNTAX("push %1"); -#line 993 "rl78-decode.opc" +#line 995 "rl78-decode.opc" ID(mov); W(); DPUSH(); SRW(rg); } @@ -5060,7 +5061,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("mov %0, #%1"); -#line 638 "rl78-decode.opc" +#line 639 "rl78-decode.opc" ID(mov); DM(SP, IMMU(1)); SC(IMMU(1)); } @@ -5075,7 +5076,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("movw %0, #%1"); -#line 891 "rl78-decode.opc" +#line 892 "rl78-decode.opc" ID(mov); W(); DM(None, SADDR); SC(IMMU(2)); } @@ -5090,7 +5091,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("mov %e0, #%1"); -#line 617 "rl78-decode.opc" +#line 618 "rl78-decode.opc" ID(mov); DM(DE, IMMU(1)); SC(IMMU(1)); } @@ -5105,7 +5106,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("movw %0, #%1"); -#line 897 "rl78-decode.opc" +#line 898 "rl78-decode.opc" ID(mov); W(); DM(None, SFR); SC(IMMU(2)); } @@ -5120,7 +5121,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("mov %ea0, #%1"); -#line 629 "rl78-decode.opc" +#line 630 "rl78-decode.opc" ID(mov); DM(HL, IMMU(1)); SC(IMMU(1)); } @@ -5135,7 +5136,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("mov %0, #%1"); -#line 743 "rl78-decode.opc" +#line 744 "rl78-decode.opc" ID(mov); DM(None, SADDR); SC(IMMU(1)); } @@ -5150,11 +5151,11 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("mov %s0, #%1"); -#line 749 "rl78-decode.opc" +#line 750 "rl78-decode.opc" op0 = SFR; op1 = IMMU(1); ID(mov); DM(None, op0); SC(op1); - if (op0 == 0xffffb) + if (op0 == 0xffffb && isa == RL78_ISA_G14) switch (op1) { case 0x01: @@ -5192,7 +5193,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("mov %e!0, #%1"); -#line 608 "rl78-decode.opc" +#line 609 "rl78-decode.opc" ID(mov); DM(None, IMMU(2)); SC(IMMU(1)); } @@ -5203,7 +5204,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0xd3: { /** 1101 00rg cmp0 %0 */ -#line 517 "rl78-decode.opc" +#line 518 "rl78-decode.opc" int rg AU = op[0] & 0x03; if (trace) { @@ -5213,7 +5214,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" rg = 0x%x\n", rg); } SYNTAX("cmp0 %0"); -#line 517 "rl78-decode.opc" +#line 518 "rl78-decode.opc" ID(cmp); DRB(rg); SC(0); Fzac; } @@ -5228,7 +5229,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("cmp0 %0"); -#line 520 "rl78-decode.opc" +#line 521 "rl78-decode.opc" ID(cmp); DM(None, SADDR); SC(0); Fzac; /*----------------------------------------------------------------------*/ @@ -5245,7 +5246,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("cmp0 %e!0"); -#line 514 "rl78-decode.opc" +#line 515 "rl78-decode.opc" ID(cmp); DM(None, IMMU(2)); SC(0); Fzac; } @@ -5260,8 +5261,9 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("mulu x"); -#line 905 "rl78-decode.opc" - ID(mulu); +#line 906 "rl78-decode.opc" + if (isa == RL78_ISA_G14) + ID(mulu); /*----------------------------------------------------------------------*/ @@ -5277,7 +5279,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("ret"); -#line 1001 "rl78-decode.opc" +#line 1003 "rl78-decode.opc" ID(ret); } @@ -5292,7 +5294,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("mov %0, %1"); -#line 710 "rl78-decode.opc" +#line 711 "rl78-decode.opc" ID(mov); DR(X); SM(None, SADDR); } @@ -5307,7 +5309,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("mov %0, %e!1"); -#line 707 "rl78-decode.opc" +#line 708 "rl78-decode.opc" ID(mov); DR(X); SM(None, IMMU(2)); } @@ -5317,7 +5319,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0xfa: { /** 11ra 1010 movw %0, %1 */ -#line 888 "rl78-decode.opc" +#line 889 "rl78-decode.opc" int ra AU = (op[0] >> 4) & 0x03; if (trace) { @@ -5327,7 +5329,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" ra = 0x%x\n", ra); } SYNTAX("movw %0, %1"); -#line 888 "rl78-decode.opc" +#line 889 "rl78-decode.opc" ID(mov); W(); DRW(ra); SM(None, SADDR); } @@ -5337,7 +5339,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0xfb: { /** 11ra 1011 movw %0, %e!1 */ -#line 885 "rl78-decode.opc" +#line 886 "rl78-decode.opc" int ra AU = (op[0] >> 4) & 0x03; if (trace) { @@ -5347,7 +5349,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" ra = 0x%x\n", ra); } SYNTAX("movw %0, %e!1"); -#line 885 "rl78-decode.opc" +#line 886 "rl78-decode.opc" ID(mov); W(); DRW(ra); SM(None, IMMU(2)); } @@ -5362,7 +5364,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("bc $%a0"); -#line 333 "rl78-decode.opc" +#line 334 "rl78-decode.opc" ID(branch_cond); DC(pc+IMMS(1)+2); SR(None); COND(C); } @@ -5377,7 +5379,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("bz $%a0"); -#line 345 "rl78-decode.opc" +#line 346 "rl78-decode.opc" ID(branch_cond); DC(pc+IMMS(1)+2); SR(None); COND(Z); } @@ -5392,7 +5394,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("bnc $%a0"); -#line 336 "rl78-decode.opc" +#line 337 "rl78-decode.opc" ID(branch_cond); DC(pc+IMMS(1)+2); SR(None); COND(NC); } @@ -5407,7 +5409,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("bnz $%a0"); -#line 348 "rl78-decode.opc" +#line 349 "rl78-decode.opc" ID(branch_cond); DC(pc+IMMS(1)+2); SR(None); COND(NZ); /*----------------------------------------------------------------------*/ @@ -5420,7 +5422,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0xe3: { /** 1110 00rg oneb %0 */ -#line 923 "rl78-decode.opc" +#line 925 "rl78-decode.opc" int rg AU = op[0] & 0x03; if (trace) { @@ -5430,7 +5432,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" rg = 0x%x\n", rg); } SYNTAX("oneb %0"); -#line 923 "rl78-decode.opc" +#line 925 "rl78-decode.opc" ID(mov); DRB(rg); SC(1); } @@ -5445,7 +5447,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("oneb %0"); -#line 926 "rl78-decode.opc" +#line 928 "rl78-decode.opc" ID(mov); DM(None, SADDR); SC(1); /*----------------------------------------------------------------------*/ @@ -5462,7 +5464,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("oneb %e!0"); -#line 920 "rl78-decode.opc" +#line 922 "rl78-decode.opc" ID(mov); DM(None, IMMU(2)); SC(1); } @@ -5477,7 +5479,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("onew %0"); -#line 931 "rl78-decode.opc" +#line 933 "rl78-decode.opc" ID(mov); DR(AX); SC(1); } @@ -5492,7 +5494,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("onew %0"); -#line 934 "rl78-decode.opc" +#line 936 "rl78-decode.opc" ID(mov); DR(BC); SC(1); /*----------------------------------------------------------------------*/ @@ -5509,7 +5511,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("mov %0, %1"); -#line 698 "rl78-decode.opc" +#line 699 "rl78-decode.opc" ID(mov); DR(B); SM(None, SADDR); } @@ -5524,7 +5526,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("mov %0, %e!1"); -#line 692 "rl78-decode.opc" +#line 693 "rl78-decode.opc" ID(mov); DR(B); SM(None, IMMU(2)); } @@ -5539,7 +5541,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("br !%!a0"); -#line 367 "rl78-decode.opc" +#line 368 "rl78-decode.opc" ID(branch); DC(IMMU(3)); } @@ -5554,7 +5556,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("br %!a0"); -#line 370 "rl78-decode.opc" +#line 371 "rl78-decode.opc" ID(branch); DC(IMMU(2)); } @@ -5569,7 +5571,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("br $%!a0"); -#line 373 "rl78-decode.opc" +#line 374 "rl78-decode.opc" ID(branch); DC(pc+IMMS(2)+3); } @@ -5584,7 +5586,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("br $%a0"); -#line 376 "rl78-decode.opc" +#line 377 "rl78-decode.opc" ID(branch); DC(pc+IMMS(1)+2); } @@ -5595,7 +5597,7 @@ rl78_decode_opcode (unsigned long pc AU, case 0xf3: { /** 1111 00rg clrb %0 */ -#line 463 "rl78-decode.opc" +#line 464 "rl78-decode.opc" int rg AU = op[0] & 0x03; if (trace) { @@ -5605,7 +5607,7 @@ rl78_decode_opcode (unsigned long pc AU, printf (" rg = 0x%x\n", rg); } SYNTAX("clrb %0"); -#line 463 "rl78-decode.opc" +#line 464 "rl78-decode.opc" ID(mov); DRB(rg); SC(0); } @@ -5620,7 +5622,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("clrb %0"); -#line 466 "rl78-decode.opc" +#line 467 "rl78-decode.opc" ID(mov); DM(None, SADDR); SC(0); /*----------------------------------------------------------------------*/ @@ -5637,7 +5639,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("clrb %e!0"); -#line 460 "rl78-decode.opc" +#line 461 "rl78-decode.opc" ID(mov); DM(None, IMMU(2)); SC(0); } @@ -5652,7 +5654,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("clrw %0"); -#line 471 "rl78-decode.opc" +#line 472 "rl78-decode.opc" ID(mov); DR(AX); SC(0); } @@ -5667,7 +5669,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("clrw %0"); -#line 474 "rl78-decode.opc" +#line 475 "rl78-decode.opc" ID(mov); DR(BC); SC(0); /*----------------------------------------------------------------------*/ @@ -5684,7 +5686,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("mov %0, %1"); -#line 704 "rl78-decode.opc" +#line 705 "rl78-decode.opc" ID(mov); DR(C); SM(None, SADDR); } @@ -5699,7 +5701,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("mov %0, %e!1"); -#line 701 "rl78-decode.opc" +#line 702 "rl78-decode.opc" ID(mov); DR(C); SM(None, IMMU(2)); } @@ -5714,7 +5716,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("call !%!a0"); -#line 420 "rl78-decode.opc" +#line 421 "rl78-decode.opc" ID(call); DC(IMMU(3)); } @@ -5729,7 +5731,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("call %!a0"); -#line 423 "rl78-decode.opc" +#line 424 "rl78-decode.opc" ID(call); DC(IMMU(2)); } @@ -5744,7 +5746,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("call $%!a0"); -#line 426 "rl78-decode.opc" +#line 427 "rl78-decode.opc" ID(call); DC(pc+IMMS(2)+3); } @@ -5759,13 +5761,13 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); } SYNTAX("brk1"); -#line 384 "rl78-decode.opc" +#line 385 "rl78-decode.opc" ID(break); } break; } -#line 1289 "rl78-decode.opc" +#line 1291 "rl78-decode.opc" return rl78->n_bytes; } diff --git a/opcodes/rl78-decode.opc b/opcodes/rl78-decode.opc index fc0dea5..87433e8 100644 --- a/opcodes/rl78-decode.opc +++ b/opcodes/rl78-decode.opc @@ -164,7 +164,8 @@ int rl78_decode_opcode (unsigned long pc AU, RL78_Opcode_Decoded * rl78, int (* getbyte)(void *), - void * ptr) + void * ptr, + RL78_Dis_Isa isa) { LocalData lds, * ld = &lds; unsigned char op_buf[20] = {0}; @@ -749,7 +750,7 @@ rl78_decode_opcode (unsigned long pc AU, op0 = SFR; op1 = IMMU(1); ID(mov); DM(None, op0); SC(op1); - if (op0 == 0xffffb) + if (op0 == 0xffffb && isa == RL78_ISA_G14) switch (op1) { case 0x01: @@ -902,7 +903,8 @@ rl78_decode_opcode (unsigned long pc AU, /*----------------------------------------------------------------------*/ /** 1101 0110 mulu x */ - ID(mulu); + if (isa == RL78_ISA_G14) + ID(mulu); /*----------------------------------------------------------------------*/ diff --git a/opcodes/rl78-dis.c b/opcodes/rl78-dis.c index a2298ce..25d0baf 100644 --- a/opcodes/rl78-dis.c +++ b/opcodes/rl78-dis.c @@ -24,8 +24,10 @@ #include #include "bfd.h" +#include "elf-bfd.h" #include "dis-asm.h" #include "opcode/rl78.h" +#include "elf/rl78.h" #define DEBUG_SEMANTICS 0 @@ -80,8 +82,8 @@ indirect_type (int t) } } -int -print_insn_rl78 (bfd_vma addr, disassemble_info * dis) +static int +print_insn_rl78_common (bfd_vma addr, disassemble_info * dis, RL78_Dis_Isa isa) { int rv; RL78_Data rl78_data; @@ -94,7 +96,7 @@ print_insn_rl78 (bfd_vma addr, disassemble_info * dis) rl78_data.pc = addr; rl78_data.dis = dis; - rv = rl78_decode_opcode (addr, &opcode, rl78_get_byte, &rl78_data); + rv = rl78_decode_opcode (addr, &opcode, rl78_get_byte, &rl78_data, isa); dis->bytes_per_line = 10; @@ -327,3 +329,44 @@ print_insn_rl78 (bfd_vma addr, disassemble_info * dis) return rv; } + +int +print_insn_rl78 (bfd_vma addr, disassemble_info * dis) +{ + return print_insn_rl78_common (addr, dis, RL78_ISA_DEFAULT); +} + +int +print_insn_rl78_g10 (bfd_vma addr, disassemble_info * dis) +{ + return print_insn_rl78_common (addr, dis, RL78_ISA_G10); +} + +int +print_insn_rl78_g13 (bfd_vma addr, disassemble_info * dis) +{ + return print_insn_rl78_common (addr, dis, RL78_ISA_G13); +} + +int +print_insn_rl78_g14 (bfd_vma addr, disassemble_info * dis) +{ + return print_insn_rl78_common (addr, dis, RL78_ISA_G14); +} + +disassembler_ftype +rl78_get_disassembler (bfd *abfd) +{ + int cpu = abfd->tdata.elf_obj_data->elf_header->e_flags & E_FLAG_RL78_CPU_MASK; + switch (cpu) + { + case E_FLAG_RL78_G10: + return print_insn_rl78_g10; + case E_FLAG_RL78_G13: + return print_insn_rl78_g13; + case E_FLAG_RL78_G14: + return print_insn_rl78_g14; + default: + return print_insn_rl78; + } +} diff --git a/sim/rl78/ChangeLog b/sim/rl78/ChangeLog index d515328..c3eec85 100644 --- a/sim/rl78/ChangeLog +++ b/sim/rl78/ChangeLog @@ -1,3 +1,14 @@ +2015-04-30 DJ Delorie + + * cpu.c (g14_multiply): New. + * cpu.h (g14_multiply): New. + * load.c (rl78_load): Decode ISA completely. + * main.c (main): Expand -M to include other ISAs. + * rl78.c (decode_opcode): Decode based on ISA. + * trace.c (rl78_disasm_fn): New. + (sim_disasm_init): Reset it. + (sim_disasm_one): Get correct disassembler for ISA. + 2015-04-13 Mike Frysinger * configure: Regenerate. diff --git a/sim/rl78/cpu.c b/sim/rl78/cpu.c index 32b1399..ed5f118 100644 --- a/sim/rl78/cpu.c +++ b/sim/rl78/cpu.c @@ -34,6 +34,7 @@ int rl78_in_gdb = 1; int timer_enabled = 2; int rl78_g10_mode = 0; int g13_multiply = 0; +int g14_multiply = 0; #define REGISTER_ADDRESS 0xffee0 diff --git a/sim/rl78/cpu.h b/sim/rl78/cpu.h index 0e10db9..85c03ae 100644 --- a/sim/rl78/cpu.h +++ b/sim/rl78/cpu.h @@ -99,5 +99,6 @@ extern unsigned int counts_per_insn[0x100000]; extern int rl78_g10_mode; extern int g13_multiply; +extern int g14_multiply; #endif diff --git a/sim/rl78/gdb-if.c b/sim/rl78/gdb-if.c index 6317a73..cb64b7a 100644 --- a/sim/rl78/gdb-if.c +++ b/sim/rl78/gdb-if.c @@ -86,6 +86,37 @@ sim_open (SIM_OPEN_KIND kind, sim_disasm_init (abfd); open = 1; + + while (argv != NULL && *argv != NULL) + { + if (strcmp (*argv, "g10") == 0 || strcmp (*argv, "-Mg10") == 0) + { + fprintf (stderr, "rl78 g10 support enabled.\n"); + rl78_g10_mode = 1; + g13_multiply = 0; + g14_multiply = 0; + mem_set_mirror (0, 0xf8000, 4096); + break; + } + if (strcmp (*argv, "g13") == 0 || strcmp (*argv, "-Mg13") == 0) + { + fprintf (stderr, "rl78 g13 support enabled.\n"); + rl78_g10_mode = 0; + g13_multiply = 1; + g14_multiply = 0; + break; + } + if (strcmp (*argv, "g14") == 0 || strcmp (*argv, "-Mg14") == 0) + { + fprintf (stderr, "rl78 g14 support enabled.\n"); + rl78_g10_mode = 0; + g13_multiply = 0; + g14_multiply = 1; + break; + } + argv++; + } + return &the_minisim; } diff --git a/sim/rl78/load.c b/sim/rl78/load.c index 66d00d3..ef559a5 100644 --- a/sim/rl78/load.c +++ b/sim/rl78/load.c @@ -92,13 +92,26 @@ rl78_load (bfd *prog, host_callback *callbacks, const char * const simname) return; } - rl78_g10_mode = 0; switch (elf_elfheader (prog)->e_flags & E_FLAG_RL78_CPU_MASK) { - case E_FLAG_RL78_G10: rl78_g10_mode = 1; break; - case E_FLAG_RL78_G13: g13_multiply = 1; break; + case E_FLAG_RL78_G10: + rl78_g10_mode = 1; + g13_multiply = 0; + g14_multiply = 0; + mem_set_mirror (0, 0xf8000, 4096); + break; + case E_FLAG_RL78_G13: + rl78_g10_mode = 0; + g13_multiply = 1; + g14_multiply = 0; + break; case E_FLAG_RL78_G14: + rl78_g10_mode = 0; + g13_multiply = 0; + g14_multiply = 1; + break; default: + /* Keep whatever was manually specified. */ break; } diff --git a/sim/rl78/main.c b/sim/rl78/main.c index 0ae50fd..acdc20b 100644 --- a/sim/rl78/main.c +++ b/sim/rl78/main.c @@ -68,7 +68,7 @@ main (int argc, char **argv) xmalloc_set_program_name (argv[0]); - while ((o = getopt (argc, argv, "tvdr:D:")) != -1) + while ((o = getopt (argc, argv, "tvdr:D:M:")) != -1) { switch (o) { @@ -87,6 +87,27 @@ main (int argc, char **argv) case 'D': dump_counts_filename = optarg; break; + case 'M': + if (strcmp (optarg, "g10") == 0) + { + rl78_g10_mode = 1; + g13_multiply = 0; + g14_multiply = 0; + mem_set_mirror (0, 0xf8000, 4096); + } + if (strcmp (optarg, "g13") == 0) + { + rl78_g10_mode = 0; + g13_multiply = 1; + g14_multiply = 0; + } + if (strcmp (optarg, "g14") == 0) + { + rl78_g10_mode = 0; + g13_multiply = 0; + g14_multiply = 1; + } + break; case '?': { fprintf (stderr, @@ -96,6 +117,7 @@ main (int argc, char **argv) "\t-t\t\t- trace.\n" "\t-d\t\t- disassemble.\n" "\t-r \t- ram size.\n" + "\t-M \t- mcu type, default none, allowed: g10,g13,g14\n" "\t-D \t- dump cycle count histogram\n"); exit (1); } diff --git a/sim/rl78/mem.c b/sim/rl78/mem.c index 8d95199..f40d2c1 100644 --- a/sim/rl78/mem.c +++ b/sim/rl78/mem.c @@ -63,6 +63,18 @@ mem_rom_size (int rom_bytes) rom_limit = rom_bytes; } +int mirror_rom_base = 0x01000; +int mirror_ram_base = 0xf1000; +int mirror_length = 0x7000; + +void +mem_set_mirror (int rom_base, int ram_base, int length) +{ + mirror_rom_base = rom_base; + mirror_ram_base = ram_base; + mirror_length = length; +} + /* ---------------------------------------------------------------------- */ /* Note: the RL78 memory map has a few surprises. For starters, part of the first 64k is mapped to the last 64k, depending on an SFR bit @@ -92,13 +104,11 @@ static int address_mapping (int address) { address &= MASK; - if (address >= 0xf1000 && address < ram_base) + if (address >= mirror_ram_base && address < mirror_ram_base + mirror_length) { - address &= 0xffff; - tprintf ("&"); + address = address - mirror_ram_base + mirror_rom_base; if (memory[RL78_SFR_PMC] & 1) { - tprintf ("|"); address |= 0x10000; } last_addr_was_mirror = 1; diff --git a/sim/rl78/rl78.c b/sim/rl78/rl78.c index aca6762..c8d1442 100644 --- a/sim/rl78/rl78.c +++ b/sim/rl78/rl78.c @@ -421,10 +421,16 @@ decode_opcode (void) int a, b, v, v2; unsigned int u, u2; int obits; + RL78_Dis_Isa isa; + + isa = (rl78_g10_mode ? RL78_ISA_G10 + : g14_multiply ? RL78_ISA_G14 + : g13_multiply ? RL78_ISA_G13 + : RL78_ISA_DEFAULT); rl78_data.dpc = pc; opcode_size = rl78_decode_opcode (pc, &opcode, - rl78_get_byte, &rl78_data); + rl78_get_byte, &rl78_data, isa); opcode_pc = pc; pc += opcode_size; @@ -851,7 +857,7 @@ decode_opcode (void) rl78_data.dpc = pc; opcode_size = rl78_decode_opcode (pc, &opcode, - rl78_get_byte, &rl78_data); + rl78_get_byte, &rl78_data, isa); pc += opcode_size; tprintf (" skipped: %s\n", opcode.syntax); break; diff --git a/sim/rl78/trace.c b/sim/rl78/trace.c index 764c85e..b8dfb34 100644 --- a/sim/rl78/trace.c +++ b/sim/rl78/trace.c @@ -37,6 +37,8 @@ #include "mem.h" #include "load.h" +static disassembler_ftype rl78_disasm_fn = NULL; + static int sim_dis_read (bfd_vma memaddr, bfd_byte * ptr, unsigned int length, struct disassemble_info *info) @@ -111,6 +113,7 @@ void sim_disasm_init (bfd *prog) { current_bfd = prog; + rl78_disasm_fn = NULL; } typedef struct Files @@ -256,6 +259,18 @@ sim_disasm_one (void) trace = 0; + if (!rl78_disasm_fn) + { + if (rl78_g10_mode) + rl78_disasm_fn = print_insn_rl78_g10; + else if (g14_multiply) + rl78_disasm_fn = print_insn_rl78_g14; + else if (g13_multiply) + rl78_disasm_fn = print_insn_rl78_g13; + else + rl78_disasm_fn = print_insn_rl78; + } + if (filename && functionname && lineno) { if (lineno != prev_lineno || strcmp (prev_filename, filename)) @@ -323,7 +338,7 @@ sim_disasm_one (void) printf ("\033[33m %08llx %06x: ", total_clocks, mypc); #endif - max = print_insn_rl78 (mypc, & info); + max = rl78_disasm_fn (mypc, & info); for (i = 0; i < max; i ++) printf ("%02x", mem_get_qi (mypc + i)); -- 2.7.4