From 093044735fd7db1616b1c4920c21ea6c0e0b0cc3 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Wed, 8 Jun 2022 08:24:30 -0400 Subject: [PATCH] usb: ehci-fsl: Remove non-DM code The deadline for DM_USB migration has passed and all users have been migrated. Remove now unused code. Signed-off-by: Tom Rini --- .../include/asm/arch-fsl-layerscape/immap_lsch2.h | 1 - arch/arm/include/asm/arch-ls102xa/config.h | 1 - arch/powerpc/cpu/mpc83xx/cpu_init.c | 13 ---- drivers/usb/host/ehci-fsl.c | 71 ---------------------- include/usb/ehci-ci.h | 15 ----- 5 files changed, 101 deletions(-) diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h index 61db173..4b0f554 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h @@ -37,7 +37,6 @@ #define CONFIG_SYS_XHCI_USB1_ADDR (CONFIG_SYS_IMMR + 0x01f00000) #define CONFIG_SYS_XHCI_USB2_ADDR (CONFIG_SYS_IMMR + 0x02000000) #define CONFIG_SYS_XHCI_USB3_ADDR (CONFIG_SYS_IMMR + 0x02100000) -#define CONFIG_SYS_EHCI_USB1_ADDR (CONFIG_SYS_IMMR + 0x07600000) #define CONFIG_SYS_PCIE1_ADDR (CONFIG_SYS_IMMR + 0x2400000) #define CONFIG_SYS_PCIE2_ADDR (CONFIG_SYS_IMMR + 0x2500000) #define CONFIG_SYS_PCIE3_ADDR (CONFIG_SYS_IMMR + 0x2600000) diff --git a/arch/arm/include/asm/arch-ls102xa/config.h b/arch/arm/include/asm/arch-ls102xa/config.h index 3b1d9a3..2f3409e 100644 --- a/arch/arm/include/asm/arch-ls102xa/config.h +++ b/arch/arm/include/asm/arch-ls102xa/config.h @@ -34,7 +34,6 @@ #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_IMMR + 0x011d0500) #define CONFIG_SYS_DCU_ADDR (CONFIG_SYS_IMMR + 0x01ce0000) #define CONFIG_SYS_XHCI_USB1_ADDR (CONFIG_SYS_IMMR + 0x02100000) -#define CONFIG_SYS_EHCI_USB1_ADDR (CONFIG_SYS_IMMR + 0x07600000) #define CONFIG_SYS_FSL_SEC_OFFSET 0x00700000 #define CONFIG_SYS_FSL_JR0_OFFSET 0x00710000 diff --git a/arch/powerpc/cpu/mpc83xx/cpu_init.c b/arch/powerpc/cpu/mpc83xx/cpu_init.c index e3e1bfd..33835ee 100644 --- a/arch/powerpc/cpu/mpc83xx/cpu_init.c +++ b/arch/powerpc/cpu/mpc83xx/cpu_init.c @@ -251,19 +251,6 @@ void cpu_init_f (volatile immap_t * im) im->gpio[1].dat = CONFIG_SYS_GPIO2_DAT; im->gpio[1].dir = CONFIG_SYS_GPIO2_DIR; #endif -#if defined(CONFIG_USB_EHCI_FSL) && defined(CONFIG_ARCH_MPC831X) - uint32_t temp; - struct usb_ehci *ehci = (struct usb_ehci *)CONFIG_SYS_FSL_USB1_ADDR; - - /* Configure interface. */ - setbits_be32(&ehci->control, REFSEL_16MHZ | UTMI_PHY_EN); - - /* Wait for clock to stabilize */ - do { - temp = __raw_readl(&ehci->control); - udelay(1000); - } while (!(temp & PHY_CLK_VALID)); -#endif } int cpu_init_r (void) diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c index cf1f882..82da339 100644 --- a/drivers/usb/host/ehci-fsl.c +++ b/drivers/usb/host/ehci-fsl.c @@ -29,22 +29,15 @@ DECLARE_GLOBAL_DATA_PTR; #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 #endif -#if CONFIG_IS_ENABLED(DM_USB) struct ehci_fsl_priv { struct ehci_ctrl ehci; fdt_addr_t hcd_base; char *phy_type; }; -#endif static void set_txfifothresh(struct usb_ehci *, u32); -#if CONFIG_IS_ENABLED(DM_USB) static int ehci_fsl_init(struct ehci_fsl_priv *priv, struct usb_ehci *ehci, struct ehci_hccr *hccr, struct ehci_hcor *hcor); -#else -static int ehci_fsl_init(int index, struct usb_ehci *ehci, - struct ehci_hccr *hccr, struct ehci_hcor *hcor); -#endif /* Check USB PHY clock valid */ static int usb_phy_clk_valid(struct usb_ehci *ehci) @@ -58,7 +51,6 @@ static int usb_phy_clk_valid(struct usb_ehci *ehci) } } -#if CONFIG_IS_ENABLED(DM_USB) static int ehci_fsl_of_to_plat(struct udevice *dev) { struct ehci_fsl_priv *priv = dev_get_priv(dev); @@ -150,64 +142,11 @@ U_BOOT_DRIVER(ehci_fsl) = { .priv_auto = sizeof(struct ehci_fsl_priv), .flags = DM_FLAG_ALLOC_PRIV_DMA, }; -#else -/* - * Create the appropriate control structures to manage - * a new EHCI host controller. - * - * Excerpts from linux ehci fsl driver. - */ -int ehci_hcd_init(int index, enum usb_init_type init, - struct ehci_hccr **hccr, struct ehci_hcor **hcor) -{ - struct ehci_ctrl *ehci_ctrl = container_of(hccr, - struct ehci_ctrl, hccr); - struct usb_ehci *ehci = NULL; - - switch (index) { - case 0: - ehci = (struct usb_ehci *)CONFIG_SYS_FSL_USB1_ADDR; - break; - case 1: - ehci = (struct usb_ehci *)CONFIG_SYS_FSL_USB2_ADDR; - break; - default: - printf("ERROR: wrong controller index!!\n"); - return -EINVAL; - }; - - *hccr = (struct ehci_hccr *)((uint32_t)&ehci->caplength); - *hcor = (struct ehci_hcor *)((uint32_t) *hccr + - HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase))); - - ehci_ctrl->has_fsl_erratum_a005275 = has_erratum_a005275(); - - return ehci_fsl_init(index, ehci, *hccr, *hcor); -} -/* - * Destroy the appropriate control structures corresponding - * the the EHCI host controller. - */ -int ehci_hcd_stop(int index) -{ - return 0; -} -#endif - -#if CONFIG_IS_ENABLED(DM_USB) static int ehci_fsl_init(struct ehci_fsl_priv *priv, struct usb_ehci *ehci, struct ehci_hccr *hccr, struct ehci_hcor *hcor) -#else -static int ehci_fsl_init(int index, struct usb_ehci *ehci, - struct ehci_hccr *hccr, struct ehci_hcor *hcor) -#endif { const char *phy_type = NULL; -#if !CONFIG_IS_ENABLED(DM_USB) - size_t len; - char current_usb_controller[5]; -#endif #ifdef CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY char usb_phy[5]; @@ -230,18 +169,8 @@ static int ehci_fsl_init(int index, struct usb_ehci *ehci, out_be32(&ehci->snoop2, 0x80000000 | SNOOP_SIZE_2GB); /* Init phy */ -#if CONFIG_IS_ENABLED(DM_USB) if (priv->phy_type) phy_type = priv->phy_type; -#else - memset(current_usb_controller, '\0', 5); - snprintf(current_usb_controller, sizeof(current_usb_controller), - "usb%d", index+1); - - if (hwconfig_sub(current_usb_controller, "phy_type")) - phy_type = hwconfig_subarg(current_usb_controller, - "phy_type", &len); -#endif else phy_type = env_get("usb_phy_type"); diff --git a/include/usb/ehci-ci.h b/include/usb/ehci-ci.h index 2cdb314..bc98093 100644 --- a/include/usb/ehci-ci.h +++ b/include/usb/ehci-ci.h @@ -146,21 +146,6 @@ #define MPC83XX_SCCR_USB_DRCM_01 0x00100000 #define MPC83XX_SCCR_USB_DRCM_10 0x00200000 -#if defined(CONFIG_MPC83xx) -#define CONFIG_SYS_FSL_USB1_ADDR CONFIG_SYS_MPC83xx_USB1_ADDR -#if defined(CONFIG_ARCH_MPC834X) -#define CONFIG_SYS_FSL_USB2_ADDR CONFIG_SYS_MPC83xx_USB2_ADDR -#else -#define CONFIG_SYS_FSL_USB2_ADDR 0 -#endif -#elif defined(CONFIG_MPC85xx) -#define CONFIG_SYS_FSL_USB1_ADDR CONFIG_SYS_MPC85xx_USB1_ADDR -#define CONFIG_SYS_FSL_USB2_ADDR CONFIG_SYS_MPC85xx_USB2_ADDR -#elif defined(CONFIG_ARCH_LS1021A) || defined(CONFIG_ARCH_LS1012A) -#define CONFIG_SYS_FSL_USB1_ADDR CONFIG_SYS_EHCI_USB1_ADDR -#define CONFIG_SYS_FSL_USB2_ADDR 0 -#endif - /* * Increasing TX FIFO threshold value from 2 to 4 decreases * data burst rate with which data packets are posted from the TX -- 2.7.4