From 0920a32cf6f20467aa133a47b776ee782daa889f Mon Sep 17 00:00:00 2001 From: Pratyush Yadav Date: Wed, 23 Dec 2020 00:14:24 +0530 Subject: [PATCH] spi: cadence-quadspi: Wait at least 500 ms for direct reads When performing a direct read via DMA the timeout for completion is set equal to the read length. This is fine for larger reads. For a small read like the Read Status Register command, the timeout would be 1 or 2 milliseconds. This is not enough to cover the overhead needed in setting up DMA. Make sure the timeout is at least 500 ms to allow DMA ample time to finish. For reads larger than 500 bytes, the timeout will continue to be equal to the read length. Signed-off-by: Pratyush Yadav Reported-by: kernel test robot Link: https://lore.kernel.org/r/20201222184425.7028-7-p.yadav@ti.com Signed-off-by: Mark Brown --- drivers/spi/spi-cadence-quadspi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/spi/spi-cadence-quadspi.c b/drivers/spi/spi-cadence-quadspi.c index 1781d4e..9004066 100644 --- a/drivers/spi/spi-cadence-quadspi.c +++ b/drivers/spi/spi-cadence-quadspi.c @@ -963,7 +963,7 @@ static int cqspi_direct_read_execute(struct cqspi_flash_pdata *f_pdata, dma_async_issue_pending(cqspi->rx_chan); if (!wait_for_completion_timeout(&cqspi->rx_dma_complete, - msecs_to_jiffies(len))) { + msecs_to_jiffies(max(len, 500UL)))) { dmaengine_terminate_sync(cqspi->rx_chan); dev_err(dev, "DMA wait_for_completion_timeout\n"); ret = -ETIMEDOUT; -- 2.7.4