From 08d6cf232c0e4ca8ebafc3e2b9eb488f014f5b41 Mon Sep 17 00:00:00 2001 From: Saagar Jha Date: Sun, 15 Jan 2023 23:38:41 -0800 Subject: [PATCH] [lldb] Fix comments referring to BCR_M_IMVA_MATCH It seems like these were copied from the single-step code and not updated to match the new flags. Differential revision: https://reviews.llvm.org/D141816 --- lldb/source/Plugins/Process/Utility/RegisterContextDarwin_arm.cpp | 4 ++-- lldb/tools/debugserver/source/MacOSX/arm/DNBArchImpl.cpp | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/lldb/source/Plugins/Process/Utility/RegisterContextDarwin_arm.cpp b/lldb/source/Plugins/Process/Utility/RegisterContextDarwin_arm.cpp index 8891512..b29d441 100644 --- a/lldb/source/Plugins/Process/Utility/RegisterContextDarwin_arm.cpp +++ b/lldb/source/Plugins/Process/Utility/RegisterContextDarwin_arm.cpp @@ -1491,7 +1491,7 @@ uint32_t RegisterContextDarwin_arm::SetHardwareBreakpoint(lldb::addr_t addr, // We have a thumb breakpoint // We have an ARM breakpoint - dbg.bcr[i] = BCR_M_IMVA_MATCH | // Stop on address mismatch + dbg.bcr[i] = BCR_M_IMVA_MATCH | // Stop on address match byte_addr_select | // Set the correct byte address select // so we only trigger on the correct // opcode @@ -1510,7 +1510,7 @@ uint32_t RegisterContextDarwin_arm::SetHardwareBreakpoint(lldb::addr_t addr, } else if (size == 4) { // We have an ARM breakpoint dbg.bcr[i] = - BCR_M_IMVA_MATCH | // Stop on address mismatch + BCR_M_IMVA_MATCH | // Stop on address match BAS_IMVA_ALL | // Stop on any of the four bytes following the IMVA S_USER | // Which modes should this breakpoint stop in? BCR_ENABLE; // Enable this hardware breakpoint diff --git a/lldb/tools/debugserver/source/MacOSX/arm/DNBArchImpl.cpp b/lldb/tools/debugserver/source/MacOSX/arm/DNBArchImpl.cpp index 0748223..92717f1 100644 --- a/lldb/tools/debugserver/source/MacOSX/arm/DNBArchImpl.cpp +++ b/lldb/tools/debugserver/source/MacOSX/arm/DNBArchImpl.cpp @@ -1011,7 +1011,7 @@ uint32_t DNBArchMachARM::EnableHardwareBreakpoint(nub_addr_t addr, // We have a thumb breakpoint // We have an ARM breakpoint m_state.dbg.__bcr[i] = - BCR_M_IMVA_MATCH | // Stop on address mismatch + BCR_M_IMVA_MATCH | // Stop on address match byte_addr_select | // Set the correct byte address select so we only // trigger on the correct opcode S_USER | // Which modes should this breakpoint stop in? @@ -1025,7 +1025,7 @@ uint32_t DNBArchMachARM::EnableHardwareBreakpoint(nub_addr_t addr, } else if (size == 4) { // We have an ARM breakpoint m_state.dbg.__bcr[i] = - BCR_M_IMVA_MATCH | // Stop on address mismatch + BCR_M_IMVA_MATCH | // Stop on address match BAS_IMVA_ALL | // Stop on any of the four bytes following the IMVA S_USER | // Which modes should this breakpoint stop in? BCR_ENABLE; // Enable this hardware breakpoint -- 2.7.4