From 087905f925c93131611d78526fb40e90cd7e7731 Mon Sep 17 00:00:00 2001 From: Anson Huang Date: Fri, 27 Mar 2020 18:55:57 +0800 Subject: [PATCH] dt-bindings: arm: fsl-scu: Add imx8dxl pinctrl support Update binding doc to support i.MX8DXL pinctrl. Signed-off-by: Anson Huang Acked-by: Rob Herring Link: https://lore.kernel.org/r/1585306559-13973-1-git-send-email-Anson.Huang@nxp.com Signed-off-by: Linus Walleij --- Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt b/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt index 623fedf..7150474 100644 --- a/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt +++ b/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt @@ -108,7 +108,8 @@ This binding uses the i.MX common pinctrl binding[3]. Required properties: - compatible: Should be one of: "fsl,imx8qm-iomuxc", - "fsl,imx8qxp-iomuxc". + "fsl,imx8qxp-iomuxc", + "fsl,imx8dxl-iomuxc". Required properties for Pinctrl sub nodes: - fsl,pins: Each entry consists of 3 integers which represents @@ -116,7 +117,8 @@ Required properties for Pinctrl sub nodes: integers are specified using a PIN_FUNC_ID macro, which can be found in , - . + , + . The last integer CONFIG is the pad setting value like pull-up on this pin. -- 2.7.4