From 071203bbf2224634fa0a271dd0816114f7c2dd83 Mon Sep 17 00:00:00 2001
From: Eli Friedman <efriedma@codeaurora.org>
Date: Fri, 24 Aug 2018 19:12:13 +0000
Subject: [PATCH] [AArch64] Reject inline asm with FP registers when FP is
 disabled.

Otherwise, we would crash trying to deal with an illegal input.

Differential Revision: https://reviews.llvm.org/D51202

llvm-svn: 340637
---
 llvm/lib/Target/AArch64/AArch64ISelLowering.cpp     |  9 +++++++++
 llvm/test/CodeGen/AArch64/inlineasm-illegal-type.ll | 17 +++++++++++++++++
 2 files changed, 26 insertions(+)
 create mode 100644 llvm/test/CodeGen/AArch64/inlineasm-illegal-type.ll

diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
index f998d0f..438a7a4 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -5443,6 +5443,8 @@ AArch64TargetLowering::getRegForInlineAsmConstraint(
         return std::make_pair(0U, &AArch64::GPR64commonRegClass);
       return std::make_pair(0U, &AArch64::GPR32commonRegClass);
     case 'w':
+      if (!Subtarget->hasFPARMv8())
+        break;
       if (VT.getSizeInBits() == 16)
         return std::make_pair(0U, &AArch64::FPR16RegClass);
       if (VT.getSizeInBits() == 32)
@@ -5455,6 +5457,8 @@ AArch64TargetLowering::getRegForInlineAsmConstraint(
     // The instructions that this constraint is designed for can
     // only take 128-bit registers so just use that regclass.
     case 'x':
+      if (!Subtarget->hasFPARMv8())
+        break;
       if (VT.getSizeInBits() == 128)
         return std::make_pair(0U, &AArch64::FPR128_loRegClass);
       break;
@@ -5490,6 +5494,11 @@ AArch64TargetLowering::getRegForInlineAsmConstraint(
     }
   }
 
+  if (Res.second && !Subtarget->hasFPARMv8() &&
+      !AArch64::GPR32allRegClass.hasSubClassEq(Res.second) &&
+      !AArch64::GPR64allRegClass.hasSubClassEq(Res.second))
+    return std::make_pair(0U, nullptr);
+
   return Res;
 }
 
diff --git a/llvm/test/CodeGen/AArch64/inlineasm-illegal-type.ll b/llvm/test/CodeGen/AArch64/inlineasm-illegal-type.ll
new file mode 100644
index 0000000..3fd894c
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/inlineasm-illegal-type.ll
@@ -0,0 +1,17 @@
+;RUN:  not llc -mtriple=aarch64-linux-gnu -mattr=-fp-armv8 < %s 2>&1 | FileCheck %s
+
+; CHECK: error: couldn't allocate output register for constraint '{d0}'
+; CHECK: error: couldn't allocate output register for constraint 'w'
+
+define hidden double @test1(double %xx) local_unnamed_addr #0 {
+entry:
+  %0 = tail call double asm "frintp ${0:d}, ${0:d}", "={d0}"()
+  ret double %0
+}
+
+define hidden double @test2(double %xx) local_unnamed_addr #0 {
+entry:
+  %0 = tail call double asm "frintp ${0:d}, ${0:d}", "=w"()
+  ret double %0
+}
+
-- 
2.7.4