From 06c73a39c38b9321e638002450dcb22aa592ae99 Mon Sep 17 00:00:00 2001 From: Srinivasa Rao Mandadapu Date: Mon, 13 Jun 2022 13:54:03 +0530 Subject: [PATCH] arm64: dts: qcom: sc7280: Add secondary MI2S pinmux specifications for CRD 3.0/3.1 Add drive strength property for secondary MI2S on sc7280 based platforms of rev5+ (aka CRD 3.0/3.1) boards. Signed-off-by: Srinivasa Rao Mandadapu Co-developed-by: Venkata Prasad Potturu Signed-off-by: Venkata Prasad Potturu Reviewed-by: Matthias Kaehlcke Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/1655108645-1517-3-git-send-email-quic_srivasam@quicinc.com --- .../dts/qcom/sc7280-herobrine-audio-wcd9385.dtsi | 20 ++++++++++++++++++++ arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts | 1 + 2 files changed, 21 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/sc7280-herobrine-audio-wcd9385.dtsi diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine-audio-wcd9385.dtsi b/arch/arm64/boot/dts/qcom/sc7280-herobrine-audio-wcd9385.dtsi new file mode 100644 index 0000000..32a1e78 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine-audio-wcd9385.dtsi @@ -0,0 +1,20 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * sc7280 device tree source for boards using Max98360 and wcd9385 codec + * + * Copyright (c) 2022, The Linux Foundation. All rights reserved. + */ + +&mi2s1_data0 { + drive-strength = <6>; + bias-disable; +}; + +&mi2s1_sclk { + drive-strength = <6>; + bias-disable; +}; + +&mi2s1_ws { + drive-strength = <6>; +}; diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts b/arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts index a4ac33c..53feaed 100644 --- a/arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts +++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dts @@ -8,6 +8,7 @@ /dts-v1/; #include "sc7280-herobrine.dtsi" +#include "sc7280-herobrine-audio-wcd9385.dtsi" / { model = "Qualcomm Technologies, Inc. sc7280 CRD platform (rev5+)"; -- 2.7.4