From 06b309d5274951a9c3c37598afece51b3948e2a4 Mon Sep 17 00:00:00 2001 From: David Green Date: Sun, 15 Sep 2019 11:53:05 +0000 Subject: [PATCH] [ARM] Simplify and update vmla test. NFC llvm-svn: 371930 --- llvm/test/CodeGen/Thumb2/mve-vmaxv.ll | 1 + llvm/test/CodeGen/Thumb2/mve-vmla.ll | 76 +++++++++++++++++------------------ 2 files changed, 38 insertions(+), 39 deletions(-) diff --git a/llvm/test/CodeGen/Thumb2/mve-vmaxv.ll b/llvm/test/CodeGen/Thumb2/mve-vmaxv.ll index 8a7ae49..4c705b75 100644 --- a/llvm/test/CodeGen/Thumb2/mve-vmaxv.ll +++ b/llvm/test/CodeGen/Thumb2/mve-vmaxv.ll @@ -1,3 +1,4 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: llc -mtriple=thumbv8.1m.main-arm-none-eabi -mattr=+mve.fp %s -o - | FileCheck %s declare i8 @llvm.experimental.vector.reduce.smax.v16i8(<16 x i8>) diff --git a/llvm/test/CodeGen/Thumb2/mve-vmla.ll b/llvm/test/CodeGen/Thumb2/mve-vmla.ll index b45efdf..b75fc96 100644 --- a/llvm/test/CodeGen/Thumb2/mve-vmla.ll +++ b/llvm/test/CodeGen/Thumb2/mve-vmla.ll @@ -1,3 +1,4 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: llc -mtriple=thumbv8.1m.main-arm-none-eabi -mattr=+mve.fp %s -o - | FileCheck %s define arm_aapcs_vfpcc <4 x i32> @vmlau32(<4 x i32> %A, <4 x i32> %B, i32 %X) nounwind { @@ -80,27 +81,26 @@ entry: define void @vmla32_in_loop(i32* %s1, i32 %x, i32* %d, i32 %n) { ; CHECK-LABEL: vmla32_in_loop: -; CHECK: .LBB6_1: @ %vector.body +; CHECK: @ %bb.0: @ %entry +; CHECK-NEXT: subs r0, #16 +; CHECK-NEXT: subs r2, #16 +; CHECK-NEXT: .LBB6_1: @ %vector.body ; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1 ; CHECK-NEXT: vldrw.u32 q0, [r0, #16]! ; CHECK-NEXT: vldrw.u32 q1, [r2, #16]! +; CHECK-NEXT: subs r3, #4 ; CHECK-NEXT: vmla.u32 q1, q0, r1 ; CHECK-NEXT: vstrw.32 q1, [r2] -; CHECK-NEXT: le lr, .LBB6_1 +; CHECK-NEXT: bne .LBB6_1 ; CHECK-NEXT: @ %bb.2: @ %for.cond.cleanup -; CHECK-NEXT: pop {r7, pc} +; CHECK-NEXT: bx lr entry: - %cmp6 = icmp sgt i32 %n, 0 - br i1 %cmp6, label %vector.ph, label %for.cond.cleanup - -vector.ph: ; preds = %for.body.preheader - %n.vec = and i32 %n, -4 %broadcast.splatinsert8 = insertelement <4 x i32> undef, i32 %x, i32 0 %broadcast.splat9 = shufflevector <4 x i32> %broadcast.splatinsert8, <4 x i32> undef, <4 x i32> zeroinitializer br label %vector.body -vector.body: ; preds = %vector.body, %vector.ph - %index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ] +vector.body: + %index = phi i32 [ 0, %entry ], [ %index.next, %vector.body ] %0 = getelementptr inbounds i32, i32* %s1, i32 %index %1 = bitcast i32* %0 to <4 x i32>* %wide.load = load <4 x i32>, <4 x i32>* %1, align 4 @@ -112,36 +112,35 @@ vector.body: ; preds = %vector.body, %vecto %6 = bitcast i32* %3 to <4 x i32>* store <4 x i32> %5, <4 x i32>* %6, align 4 %index.next = add i32 %index, 4 - %7 = icmp eq i32 %index.next, %n.vec + %7 = icmp eq i32 %index.next, %n br i1 %7, label %for.cond.cleanup, label %vector.body -for.cond.cleanup: ; preds = %for.body, %middle.block, %entry +for.cond.cleanup: ret void } define void @vmla16_in_loop(i16* %s1, i16 %x, i16* %d, i32 %n) { ; CHECK-LABEL: vmla16_in_loop: -; CHECK: .LBB7_1: @ %vector.body +; CHECK: @ %bb.0: @ %entry +; CHECK-NEXT: subs r0, #16 +; CHECK-NEXT: subs r2, #16 +; CHECK-NEXT: .LBB7_1: @ %vector.body ; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1 ; CHECK-NEXT: vldrh.u16 q0, [r0, #16]! ; CHECK-NEXT: vldrh.u16 q1, [r2, #16]! +; CHECK-NEXT: subs r3, #8 ; CHECK-NEXT: vmla.u16 q1, q0, r1 ; CHECK-NEXT: vstrh.16 q1, [r2] -; CHECK-NEXT: le lr, .LBB7_1 +; CHECK-NEXT: bne .LBB7_1 ; CHECK-NEXT: @ %bb.2: @ %for.cond.cleanup -; CHECK-NEXT: pop {r7, pc} +; CHECK-NEXT: bx lr entry: - %cmp6 = icmp sgt i32 %n, 0 - br i1 %cmp6, label %vector.ph, label %for.cond.cleanup - -vector.ph: ; preds = %for.body.preheader - %n.vec = and i32 %n, -8 %broadcast.splatinsert11 = insertelement <8 x i16> undef, i16 %x, i32 0 %broadcast.splat12 = shufflevector <8 x i16> %broadcast.splatinsert11, <8 x i16> undef, <8 x i32> zeroinitializer br label %vector.body -vector.body: ; preds = %vector.body, %vector.ph - %index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ] +vector.body: + %index = phi i32 [ 0, %entry ], [ %index.next, %vector.body ] %0 = getelementptr inbounds i16, i16* %s1, i32 %index %1 = bitcast i16* %0 to <8 x i16>* %wide.load = load <8 x i16>, <8 x i16>* %1, align 2 @@ -153,36 +152,35 @@ vector.body: ; preds = %vector.body, %vecto %6 = bitcast i16* %3 to <8 x i16>* store <8 x i16> %5, <8 x i16>* %6, align 2 %index.next = add i32 %index, 8 - %7 = icmp eq i32 %index.next, %n.vec + %7 = icmp eq i32 %index.next, %n br i1 %7, label %for.cond.cleanup, label %vector.body -for.cond.cleanup: ; preds = %for.body, %middle.block, %entry +for.cond.cleanup: ret void } define void @vmla8_in_loop(i8* %s1, i8 %x, i8* %d, i32 %n) { ; CHECK-LABEL: vmla8_in_loop: -; CHECK: .LBB8_1: @ %vector.body +; CHECK: @ %bb.0: @ %entry +; CHECK-NEXT: subs r0, #16 +; CHECK-NEXT: subs r2, #16 +; CHECK-NEXT: .LBB8_1: @ %vector.body ; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1 -; CHECK-NEXT: vldrh.u16 q0, [r0, #8]! -; CHECK-NEXT: vldrh.u16 q1, [r2, #8]! +; CHECK-NEXT: vldrh.u16 q0, [r0, #16]! +; CHECK-NEXT: vldrh.u16 q1, [r2, #16]! +; CHECK-NEXT: subs r3, #16 ; CHECK-NEXT: vmla.u8 q1, q0, r1 ; CHECK-NEXT: vstrh.16 q1, [r2] -; CHECK-NEXT: le lr, .LBB8_1 +; CHECK-NEXT: bne .LBB8_1 ; CHECK-NEXT: @ %bb.2: @ %for.cond.cleanup -; CHECK-NEXT: pop {r7, pc} +; CHECK-NEXT: bx lr entry: - %cmp6 = icmp sgt i32 %n, 0 - br i1 %cmp6, label %vector.ph, label %for.cond.cleanup - -vector.ph: ; preds = %for.body.preheader - %n.vec = and i32 %n, -8 %broadcast.splatinsert11 = insertelement <16 x i8> undef, i8 %x, i32 0 %broadcast.splat12 = shufflevector <16 x i8> %broadcast.splatinsert11, <16 x i8> undef, <16 x i32> zeroinitializer br label %vector.body -vector.body: ; preds = %vector.body, %vector.ph - %index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ] +vector.body: + %index = phi i32 [ 0, %entry ], [ %index.next, %vector.body ] %0 = getelementptr inbounds i8, i8* %s1, i32 %index %1 = bitcast i8* %0 to <16 x i8>* %wide.load = load <16 x i8>, <16 x i8>* %1, align 2 @@ -193,10 +191,10 @@ vector.body: ; preds = %vector.body, %vecto %5 = add <16 x i8> %2, %wide.load13 %6 = bitcast i8* %3 to <16 x i8>* store <16 x i8> %5, <16 x i8>* %6, align 2 - %index.next = add i32 %index, 8 - %7 = icmp eq i32 %index.next, %n.vec + %index.next = add i32 %index, 16 + %7 = icmp eq i32 %index.next, %n br i1 %7, label %for.cond.cleanup, label %vector.body -for.cond.cleanup: ; preds = %for.body, %middle.block, %entry +for.cond.cleanup: ret void } -- 2.7.4