From 067a3237b955cc2a789caf34ad0d8afa54d9cac3 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Marek=20Ol=C5=A1=C3=A1k?= Date: Thu, 29 Dec 2016 19:00:43 +0100 Subject: [PATCH] radeonsi: also wait for SDMA in the clear_buffer CPU fallback MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Reviewed-by: Nicolai Hähnle --- src/gallium/drivers/radeonsi/si_cp_dma.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_cp_dma.c b/src/gallium/drivers/radeonsi/si_cp_dma.c index b25598c..722ac4d 100644 --- a/src/gallium/drivers/radeonsi/si_cp_dma.c +++ b/src/gallium/drivers/radeonsi/si_cp_dma.c @@ -184,9 +184,8 @@ static void si_clear_buffer(struct pipe_context *ctx, struct pipe_resource *dst, /* Fallback for unaligned clears. */ if (offset % 4 != 0 || size % 4 != 0) { - uint8_t *map = sctx->b.ws->buffer_map(r600_resource(dst)->buf, - sctx->b.gfx.cs, - PIPE_TRANSFER_WRITE); + uint8_t *map = r600_buffer_map_sync_with_rings(&sctx->b, rdst, + PIPE_TRANSFER_WRITE); map += offset; for (uint64_t i = 0; i < size; i++) { unsigned byte_within_dword = (offset + i) % 4; -- 2.7.4