From 0660567dc11b608575834adbc6c5cebf27e6fba8 Mon Sep 17 00:00:00 2001 From: "mason.huo" Date: Fri, 8 Jul 2022 11:24:21 +0800 Subject: [PATCH] usb: cdns3: Configuare phy as down-spread-spectrum The default phy spread-spectrum mode is up-spread-spectrum, which is violated the usb3 spec. The up-spread-spectrum mode leads to phy buffers overrun. Signed-off-by: mason.huo --- arch/riscv/boot/dts/starfive/jh7110.dtsi | 11 +++++++---- drivers/usb/cdns3/cdns3-starfive.c | 12 ++++++++++++ 2 files changed, 19 insertions(+), 4 deletions(-) diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi index 4aebab0..9efc150 100644 --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi @@ -373,19 +373,22 @@ usbdrd30: usbdrd{ compatible = "starfive,jh7110-cdns3"; + reg = <0x0 0x10210000 0x0 0x1000>; clocks = <&clkgen JH7110_USB_125M>, <&clkgen JH7110_USB0_CLK_APP_125>, <&clkgen JH7110_USB0_CLK_LPM>, <&clkgen JH7110_USB0_CLK_STB>, <&clkgen JH7110_USB0_CLK_USB_APB>, <&clkgen JH7110_USB0_CLK_AXI>, - <&clkgen JH7110_USB0_CLK_UTMI_APB>; - clock-names = "125m","app","lpm","stb","apb","axi","utmi"; + <&clkgen JH7110_USB0_CLK_UTMI_APB>, + <&clkgen JH7110_PCIE0_CLK_APB>; + clock-names = "125m","app","lpm","stb","apb","axi","utmi", "phy"; resets = <&rstgen RSTN_U0_CDN_USB_PWRUP>, <&rstgen RSTN_U0_CDN_USB_APB>, <&rstgen RSTN_U0_CDN_USB_AXI>, - <&rstgen RSTN_U0_CDN_USB_UTMI_APB>; - reset-names = "pwrup","apb","axi","utmi"; + <&rstgen RSTN_U0_CDN_USB_UTMI_APB>, + <&rstgen RSTN_U0_PLDA_PCIE_APB>; + reset-names = "pwrup","apb","axi","utmi", "phy"; starfive,stg-syscon = <&stg_syscon 0x4 0xc4 0x148 0x1f4>; starfive,sys-syscon = <&sys_syscon 0x18>; status = "disabled"; diff --git a/drivers/usb/cdns3/cdns3-starfive.c b/drivers/usb/cdns3/cdns3-starfive.c index efd9038..dcefbc8 100644 --- a/drivers/usb/cdns3/cdns3-starfive.c +++ b/drivers/usb/cdns3/cdns3-starfive.c @@ -49,6 +49,8 @@ #define PCIE_USB3_RX_STANDBY_MASK 0x80 #define PCIE_USB3_PHY_ENABLE_SHIFT 0x4 #define PCIE_USB3_PHY_ENABLE_MASK 0x10 +#define PCIE_USB3_PHY_PLL_CTL_OFF (0x1f * 4) + #define USB_125M_CLK_RATE 125000000 @@ -192,6 +194,7 @@ static int cdns_starfive_probe(struct platform_device *pdev) struct device_node *node = pdev->dev.of_node; struct cdns_starfive *data; struct of_phandle_args args; + void __iomem *phybase; int ret; data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL); @@ -240,6 +243,15 @@ static int cdns_starfive_probe(struct platform_device *pdev) goto exit; } + /* Configuare spread-spectrum mode: down-spread-Spectrum */ + phybase = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(phybase)) { + dev_err(dev, "Can't map IOMEM resource\n"); + ret = PTR_ERR(phybase); + goto exit; + } + writel(BIT(4), (phybase + PCIE_USB3_PHY_PLL_CTL_OFF)); + ret = of_platform_populate(node, NULL, NULL, dev); if (ret) { dev_err(dev, "Failed to create children: %d\n", ret); -- 2.7.4