From 06460049f69b2769c31c51520ae07af394a0a33b Mon Sep 17 00:00:00 2001 From: Ben Widawsky Date: Thu, 15 Dec 2011 13:54:30 -0800 Subject: [PATCH] intel-decode: fix flush dword post sync parse Signed-off-by: Ben Widawsky --- tools/intel_decode.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/tools/intel_decode.c b/tools/intel_decode.c index 53951d4..344578b 100644 --- a/tools/intel_decode.c +++ b/tools/intel_decode.c @@ -170,10 +170,10 @@ decode_mi(uint32_t *data, int count, uint32_t hw_offset, int *failures) return len; case 0x26: switch (data[0] & (0x3<<14)) { - case 0: post_sync_op = "no write"; break; - case 1: post_sync_op = "write data"; break; - case 2: post_sync_op = "reserved"; break; - case 3: post_sync_op = "write TIMESTAMP"; break; + case (0<<14): post_sync_op = "no write"; break; + case (1<<14): post_sync_op = "write data"; break; + case (2<<14): post_sync_op = "reserved"; break; + case (3<<14): post_sync_op = "write TIMESTAMP"; break; } instr_out(data, hw_offset, 0, "MI_FLUSH_DW%s%s%s%s post_sync_op='%s' %s%s\n", data[0] & (1<<22) ? " enable protected mem (BCS-only)," : "", -- 2.7.4