From 06407c032038c6c3c3776fcb9ad8b06729e0c1d8 Mon Sep 17 00:00:00 2001
From: Pawel Bylica <chfast@gmail.com>
Date: Mon, 22 Jun 2015 15:58:11 +0000
Subject: [PATCH] Fix shl folding in DAG combiner.

Summary: The code responsible for shl folding in the DAGCombiner was assuming incorrectly that all constants are less than 64 bits. This patch simply changes the way values are compared.

Test Plan: A regression test included.

Reviewers: andreadb

Reviewed By: andreadb

Subscribers: andreadb, test, llvm-commits

Differential Revision: http://reviews.llvm.org/D10602

llvm-svn: 240291
---
 llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp  | 2 +-
 llvm/test/CodeGen/X86/fold-vector-shl-crash.ll | 8 ++++++++
 2 files changed, 9 insertions(+), 1 deletion(-)
 create mode 100644 llvm/test/CodeGen/X86/fold-vector-shl-crash.ll

diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index bc2e5f1..80a1b5b 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -4275,7 +4275,7 @@ SDValue DAGCombiner::visitSHL(SDNode *N) {
   if (isNullConstant(N0))
     return N0;
   // fold (shl x, c >= size(x)) -> undef
-  if (N1C && N1C->getZExtValue() >= OpSizeInBits)
+  if (N1C && N1C->getAPIntValue().uge(OpSizeInBits))
     return DAG.getUNDEF(VT);
   // fold (shl x, 0) -> x
   if (N1C && N1C->isNullValue())
diff --git a/llvm/test/CodeGen/X86/fold-vector-shl-crash.ll b/llvm/test/CodeGen/X86/fold-vector-shl-crash.ll
new file mode 100644
index 0000000..b0341e0
--- /dev/null
+++ b/llvm/test/CodeGen/X86/fold-vector-shl-crash.ll
@@ -0,0 +1,8 @@
+; RUN: llc < %s | FileCheck %s
+
+;CHECK-LABEL: test
+define <2 x i256> @test() {
+  %S = shufflevector <2 x i256> zeroinitializer, <2 x i256> <i256 -1, i256 -1>, <2 x i32> <i32 0, i32 2>
+  %B = shl <2 x i256> %S, <i256 -1, i256 -1> ; DAG Combiner crashes here
+  ret <2 x i256> %B
+}
-- 
2.7.4