From 0607f34bc7c4a1e7ef6594a5d3a84116e89866e8 Mon Sep 17 00:00:00 2001 From: kyukhin Date: Tue, 14 Oct 2014 08:20:43 +0000 Subject: [PATCH] AVX-512. 61/n. Update FP logic insn patterns. gcc/ * config/i386/sse.md (define_insn "_andnot3"): Add masking, use VF_128_256 mode iterator and update assembler emit code. (define_insn "_andnot3"): New. (define_expand "3"): Add masking, use VF_128_256 mode iterator. (define_expand "3"): New. (define_insn "*3"): Add masking, use VF_128_256 mode iterator and update assembler emit code. (define_insn "*3"): New. (define_mode_attr avx512flogicsuff): Delete. (define_insn "avx512f_"): Ditto. (define_insn "*andnot3"): Update MODE_XI, MODE_OI, MODE_TI. (define_insn "3"): Ditto. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@216179 138bc75d-0d04-0410-961f-82ee72b054a4 --- gcc/ChangeLog | 26 +++++++ gcc/config/i386/sse.md | 206 +++++++++++++++++++++++++++++++++---------------- 2 files changed, 167 insertions(+), 65 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 18cefaf..5806e05 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -8,6 +8,32 @@ Michael Zolotukhin * config/i386/sse.md + (define_insn "_andnot3"): Add masking, + use VF_128_256 mode iterator and update assembler emit code. + (define_insn "_andnot3"): New. + (define_expand "3"): + Add masking, use VF_128_256 mode iterator. + (define_expand "3"): New. + (define_insn "*3"): + Add masking, use VF_128_256 mode iterator and update assembler emit + code. + (define_insn "*3"): New. + (define_mode_attr avx512flogicsuff): Delete. + (define_insn "avx512f_"): Ditto. + (define_insn "*andnot3"): Update MODE_XI, MODE_OI, + MODE_TI. + (define_insn "3"): Ditto. + +2014-10-14 Alexander Ivchenko + Maxim Kuznetsov + Anna Tikhonova + Ilya Tocar + Andrey Turetskiy + Ilya Verbin + Kirill Yukhin + Michael Zolotukhin + + * config/i386/sse.md (define_mode_iterator VI128_128 [V16QI V8HI V2DI]): Delete. (define_expand "vashr3"): Add masking, use VI12_128 mode iterator. diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index f4586d9..a760f53 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -2692,15 +2692,15 @@ ;; ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -(define_insn "_andnot3" - [(set (match_operand:VF 0 "register_operand" "=x,v") - (and:VF - (not:VF - (match_operand:VF 1 "register_operand" "0,v")) - (match_operand:VF 2 "nonimmediate_operand" "xm,vm")))] - "TARGET_SSE" +(define_insn "_andnot3" + [(set (match_operand:VF_128_256 0 "register_operand" "=x,v") + (and:VF_128_256 + (not:VF_128_256 + (match_operand:VF_128_256 1 "register_operand" "0,v")) + (match_operand:VF_128_256 2 "nonimmediate_operand" "xm,vm")))] + "TARGET_SSE && " { - static char buf[32]; + static char buf[128]; const char *ops; const char *suffix; @@ -2720,17 +2720,17 @@ ops = "andn%s\t{%%2, %%0|%%0, %%2}"; break; case 1: - ops = "vandn%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; + ops = "vandn%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; break; default: gcc_unreachable (); } - /* There is no vandnp[sd]. Use vpandnq. */ - if ( == 64) + /* There is no vandnp[sd] in avx512f. Use vpandn[qd]. */ + if ( && !TARGET_AVX512DQ) { - suffix = "q"; - ops = "vpandn%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; + suffix = GET_MODE_INNER (mode) == DFmode ? "q" : "d"; + ops = "vpandn%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; } snprintf (buf, sizeof (buf), ops, suffix); @@ -2750,30 +2750,63 @@ ] (const_string "")))]) -(define_expand "3" + +(define_insn "_andnot3" + [(set (match_operand:VF_512 0 "register_operand" "=v") + (and:VF_512 + (not:VF_512 + (match_operand:VF_512 1 "register_operand" "v")) + (match_operand:VF_512 2 "nonimmediate_operand" "vm")))] + "TARGET_AVX512F" +{ + static char buf[128]; + const char *ops; + const char *suffix; + + suffix = ""; + ops = ""; + + /* There is no vandnp[sd] in avx512f. Use vpandn[qd]. */ + if (!TARGET_AVX512DQ) + { + suffix = GET_MODE_INNER (mode) == DFmode ? "q" : "d"; + ops = "p"; + } + + snprintf (buf, sizeof (buf), + "v%sandn%s\t{%%2, %%1, %%0|%%0, %%1, %%2}", + ops, suffix); + return buf; +} + [(set_attr "type" "sselog") + (set_attr "prefix" "evex") + (set_attr "mode" "")]) + +(define_expand "3" [(set (match_operand:VF_128_256 0 "register_operand") - (any_logic:VF_128_256 - (match_operand:VF_128_256 1 "nonimmediate_operand") - (match_operand:VF_128_256 2 "nonimmediate_operand")))] - "TARGET_SSE" + (any_logic:VF_128_256 + (match_operand:VF_128_256 1 "nonimmediate_operand") + (match_operand:VF_128_256 2 "nonimmediate_operand")))] + "TARGET_SSE && " "ix86_fixup_binary_operands_no_copy (, mode, operands);") -(define_expand "3" +(define_expand "3" [(set (match_operand:VF_512 0 "register_operand") - (fpint_logic:VF_512 + (any_logic:VF_512 (match_operand:VF_512 1 "nonimmediate_operand") (match_operand:VF_512 2 "nonimmediate_operand")))] "TARGET_AVX512F" "ix86_fixup_binary_operands_no_copy (, mode, operands);") -(define_insn "*3" - [(set (match_operand:VF 0 "register_operand" "=x,v") - (any_logic:VF - (match_operand:VF 1 "nonimmediate_operand" "%0,v") - (match_operand:VF 2 "nonimmediate_operand" "xm,vm")))] - "TARGET_SSE && ix86_binary_operator_ok (, mode, operands)" +(define_insn "*3" + [(set (match_operand:VF_128_256 0 "register_operand" "=x,v") + (any_logic:VF_128_256 + (match_operand:VF_128_256 1 "nonimmediate_operand" "%0,v") + (match_operand:VF_128_256 2 "nonimmediate_operand" "xm,vm")))] + "TARGET_SSE && + && ix86_binary_operator_ok (, mode, operands)" { - static char buf[32]; + static char buf[128]; const char *ops; const char *suffix; @@ -2793,17 +2826,17 @@ ops = "%s\t{%%2, %%0|%%0, %%2}"; break; case 1: - ops = "v%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; + ops = "v%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; break; default: gcc_unreachable (); } - /* There is no vp[sd]. Use vpq. */ - if ( == 64) + /* There is no vp[sd] in avx512f. Use vp[dq]. */ + if ( && !TARGET_AVX512DQ) { - suffix = "q"; - ops = "vp%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; + suffix = GET_MODE_INNER (mode) == DFmode ? "q" : "d"; + ops = "vp%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; } snprintf (buf, sizeof (buf), ops, suffix); @@ -2823,6 +2856,36 @@ ] (const_string "")))]) +(define_insn "*3" + [(set (match_operand:VF_512 0 "register_operand" "=v") + (any_logic:VF_512 + (match_operand:VF_512 1 "nonimmediate_operand" "%v") + (match_operand:VF_512 2 "nonimmediate_operand" "vm")))] + "TARGET_AVX512F && ix86_binary_operator_ok (, mode, operands)" +{ + static char buf[128]; + const char *ops; + const char *suffix; + + suffix = ""; + ops = ""; + + /* There is no vp[sd] in avx512f. Use vp[dq]. */ + if (( == 64 || ) && !TARGET_AVX512DQ) + { + suffix = GET_MODE_INNER (mode) == DFmode ? "q" : "d"; + ops = "p"; + } + + snprintf (buf, sizeof (buf), + "v%s%s\t{%%2, %%1, %%0|%%0, %%1, %%2}", + ops, suffix); + return buf; +} + [(set_attr "type" "sselog") + (set_attr "prefix" "evex") + (set_attr "mode" "")]) + (define_expand "copysign3" [(set (match_dup 4) (and:VF @@ -3032,23 +3095,6 @@ ] (const_string "TI")))]) -;; There are no floating point xor for V16SF and V8DF in avx512f -;; but we need them for negation. Instead we use int versions of -;; xor. Maybe there could be a better way to do that. - -(define_mode_attr avx512flogicsuff - [(V16SF "d") (V8DF "q")]) - -(define_insn "avx512f_" - [(set (match_operand:VF_512 0 "register_operand" "=v") - (fpint_logic:VF_512 - (match_operand:VF_512 1 "register_operand" "v") - (match_operand:VF_512 2 "nonimmediate_operand" "vm")))] - "TARGET_AVX512F" - "vp\t{%2, %1, %0|%0, %1, %2}" - [(set_attr "type" "sselog") - (set_attr "prefix" "evex")]) - ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;; ;; FMA floating point multiply/accumulate instructions. These include @@ -10539,16 +10585,31 @@ { case MODE_XI: gcc_assert (TARGET_AVX512F); - - tmp = "pandn"; - break; - case MODE_OI: - gcc_assert (TARGET_AVX2); + gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: - gcc_assert (TARGET_SSE2); - - tmp = "pandn"; + gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); + switch (mode) + { + case V16SImode: + case V8DImode: + if (TARGET_AVX512F) + { + tmp = "pandn"; + break; + } + case V8SImode: + case V4DImode: + case V4SImode: + case V2DImode: + if (TARGET_AVX512VL) + { + tmp = "pandn"; + break; + } + default: + tmp = TARGET_AVX512VL ? "pandnq" : "pandn"; + } break; case MODE_V16SF: @@ -10633,16 +10694,31 @@ { case MODE_XI: gcc_assert (TARGET_AVX512F); - - tmp = "p"; - break; - case MODE_OI: - gcc_assert (TARGET_AVX2); + gcc_assert (TARGET_AVX2 || TARGET_AVX512VL); case MODE_TI: - gcc_assert (TARGET_SSE2); - - tmp = "p"; + gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); + switch (mode) + { + case V16SImode: + case V8DImode: + if (TARGET_AVX512F) + { + tmp = "p"; + break; + } + case V8SImode: + case V4DImode: + case V4SImode: + case V2DImode: + if (TARGET_AVX512VL) + { + tmp = "p"; + break; + } + default: + tmp = TARGET_AVX512VL ? "pq" : "p"; + } break; case MODE_V16SF: -- 2.7.4