From 05f011b2b6e5992b1637bf306a7f61c17fde83b0 Mon Sep 17 00:00:00 2001
From: Sanjay Patel <spatel@rotateright.com>
Date: Mon, 26 Oct 2020 16:24:35 -0400
Subject: [PATCH] [InstCombine] add tests for ctpop at bitwidth limit; NFC

---
 llvm/test/Transforms/InstCombine/cmp-intrinsic.ll | 31 ++++++++++++++++++++---
 1 file changed, 27 insertions(+), 4 deletions(-)

diff --git a/llvm/test/Transforms/InstCombine/cmp-intrinsic.ll b/llvm/test/Transforms/InstCombine/cmp-intrinsic.ll
index 82b32ee..6519eda 100644
--- a/llvm/test/Transforms/InstCombine/cmp-intrinsic.ll
+++ b/llvm/test/Transforms/InstCombine/cmp-intrinsic.ll
@@ -116,7 +116,7 @@ define <2 x i1> @ctlz_ne_other_v2i32(<2 x i32> %a) {
 
 define i1 @ctlz_eq_other_i32_multiuse(i32 %x, i32* %p) {
 ; CHECK-LABEL: @ctlz_eq_other_i32_multiuse(
-; CHECK-NEXT:    [[LZ:%.*]] = tail call i32 @llvm.ctlz.i32(i32 [[X:%.*]], i1 false), !range !0
+; CHECK-NEXT:    [[LZ:%.*]] = tail call i32 @llvm.ctlz.i32(i32 [[X:%.*]], i1 false), [[RNG0:!range !.*]]
 ; CHECK-NEXT:    store i32 [[LZ]], i32* [[P:%.*]], align 4
 ; CHECK-NEXT:    [[CMP:%.*]] = icmp eq i32 [[LZ]], 24
 ; CHECK-NEXT:    ret i1 [[CMP]]
@@ -169,7 +169,7 @@ define i1 @ctlz_ugt_other_i32(i32 %x) {
 
 define i1 @ctlz_ugt_other_multiuse_i32(i32 %x, i32* %p) {
 ; CHECK-LABEL: @ctlz_ugt_other_multiuse_i32(
-; CHECK-NEXT:    [[LZ:%.*]] = tail call i32 @llvm.ctlz.i32(i32 [[X:%.*]], i1 false), !range !0
+; CHECK-NEXT:    [[LZ:%.*]] = tail call i32 @llvm.ctlz.i32(i32 [[X:%.*]], i1 false), [[RNG0]]
 ; CHECK-NEXT:    store i32 [[LZ]], i32* [[P:%.*]], align 4
 ; CHECK-NEXT:    [[CMP:%.*]] = icmp ult i32 [[X]], 32768
 ; CHECK-NEXT:    ret i1 [[CMP]]
@@ -329,7 +329,7 @@ define <2 x i1> @cttz_ne_other_v2i32(<2 x i32> %a) {
 
 define i1 @cttz_eq_other_i33_multiuse(i33 %x, i33* %p) {
 ; CHECK-LABEL: @cttz_eq_other_i33_multiuse(
-; CHECK-NEXT:    [[TZ:%.*]] = tail call i33 @llvm.cttz.i33(i33 [[X:%.*]], i1 false), !range !1
+; CHECK-NEXT:    [[TZ:%.*]] = tail call i33 @llvm.cttz.i33(i33 [[X:%.*]], i1 false), [[RNG1:!range !.*]]
 ; CHECK-NEXT:    store i33 [[TZ]], i33* [[P:%.*]], align 4
 ; CHECK-NEXT:    [[CMP:%.*]] = icmp eq i33 [[TZ]], 4
 ; CHECK-NEXT:    ret i1 [[CMP]]
@@ -375,7 +375,7 @@ define i1 @cttz_ugt_other_i33(i33 %x) {
 
 define i1 @cttz_ugt_other_multiuse_i33(i33 %x, i33* %p) {
 ; CHECK-LABEL: @cttz_ugt_other_multiuse_i33(
-; CHECK-NEXT:    [[TZ:%.*]] = tail call i33 @llvm.cttz.i33(i33 [[X:%.*]], i1 false), !range !1
+; CHECK-NEXT:    [[TZ:%.*]] = tail call i33 @llvm.cttz.i33(i33 [[X:%.*]], i1 false), [[RNG1]]
 ; CHECK-NEXT:    store i33 [[TZ]], i33* [[P:%.*]], align 4
 ; CHECK-NEXT:    [[CMP:%.*]] = icmp ugt i33 [[TZ]], 16
 ; CHECK-NEXT:    ret i1 [[CMP]]
@@ -491,3 +491,26 @@ define <2 x i1> @ctpop_ne_bitwidth_v2i32(<2 x i32> %x) {
   ret <2 x i1> %cmp
 }
 
+define i1 @ctpop_ugt_bitwidth_minus_one_i8(i8 %x, i8* %p) {
+; CHECK-LABEL: @ctpop_ugt_bitwidth_minus_one_i8(
+; CHECK-NEXT:    [[POP:%.*]] = tail call i8 @llvm.ctpop.i8(i8 [[X:%.*]]), [[RNG2:!range !.*]]
+; CHECK-NEXT:    store i8 [[POP]], i8* [[P:%.*]], align 1
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ugt i8 [[POP]], 7
+; CHECK-NEXT:    ret i1 [[CMP]]
+;
+  %pop = tail call i8 @llvm.ctpop.i8(i8 %x)
+  store i8 %pop, i8* %p
+  %cmp = icmp ugt i8 %pop, 7
+  ret i1 %cmp
+}
+
+define <2 x i1> @ctpop_ult_bitwidth_v2i32(<2 x i32> %x) {
+; CHECK-LABEL: @ctpop_ult_bitwidth_v2i32(
+; CHECK-NEXT:    [[POP:%.*]] = tail call <2 x i32> @llvm.ctpop.v2i32(<2 x i32> [[X:%.*]])
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ult <2 x i32> [[POP]], <i32 32, i32 32>
+; CHECK-NEXT:    ret <2 x i1> [[CMP]]
+;
+  %pop = tail call <2 x i32> @llvm.ctpop.v2i32(<2 x i32> %x)
+  %cmp = icmp ult <2 x i32> %pop, <i32 32, i32 32>
+  ret <2 x i1> %cmp
+}
-- 
2.7.4