From 055f7ed761e9aa79010b8b3e49ccc0119b0ac57e Mon Sep 17 00:00:00 2001 From: Brian Zhu Date: Tue, 16 Jan 2018 20:25:59 +0800 Subject: [PATCH] media: add codec_io and canvas module for g12a PD#156734: G12A: media: add codec_id and canvas module Change-Id: Ib0e4ef05c237c313f483ebe2b029bf50f57d1c0a Signed-off-by: Brian Zhu --- arch/arm64/boot/dts/amlogic/g12a_pxp.dts | 33 ++++++++++++++++++++++ .../media/common/arch/registers/register_ops_m8.c | 2 ++ drivers/amlogic/media/common/canvas/canvas_mgr.c | 3 +- drivers/amlogic/media/common/ge2d/ge2d_io.h | 6 ++-- 4 files changed, 38 insertions(+), 6 deletions(-) diff --git a/arch/arm64/boot/dts/amlogic/g12a_pxp.dts b/arch/arm64/boot/dts/amlogic/g12a_pxp.dts index 76610ef..4a7bf38 100644 --- a/arch/arm64/boot/dts/amlogic/g12a_pxp.dts +++ b/arch/arm64/boot/dts/amlogic/g12a_pxp.dts @@ -94,6 +94,39 @@ vendor_id = <0x000000>; }; }; + + canvas{ + compatible = "amlogic, meson, canvas"; + dev_name = "amlogic-canvas"; + status = "okay"; + reg = <0x0 0xff638000 0x0 0x2000>; + }; + + codec_io { + compatible = "amlogic, codec_io"; + status = "okay"; + #address-cells=<2>; + #size-cells=<2>; + ranges; + io_cbus_base{ + reg = <0x0 0xffd00000 0x0 0x100000>; + }; + io_dos_base{ + reg = <0x0 0xff620000 0x0 0x10000>; + }; + io_hiubus_base{ + reg = <0x0 0xff63c000 0x0 0x2000>; + }; + io_aobus_base{ + reg = <0x0 0xff800000 0x0 0x10000>; + }; + io_vcbus_base{ + reg = <0x0 0xff900000 0x0 0x40000>; + }; + io_dmc_base{ + reg = <0x0 0xff638000 0x0 0x2000>; + }; + }; }; /* end of / */ &aobus{ diff --git a/drivers/amlogic/media/common/arch/registers/register_ops_m8.c b/drivers/amlogic/media/common/arch/registers/register_ops_m8.c index 5ec36c7..2aee23b 100644 --- a/drivers/amlogic/media/common/arch/registers/register_ops_m8.c +++ b/drivers/amlogic/media/common/arch/registers/register_ops_m8.c @@ -28,6 +28,7 @@ MESON_CPU_MAJOR_ID_GXM, \ MESON_CPU_MAJOR_ID_TXL, \ MESON_CPU_MAJOR_ID_TXLX, \ + MESON_CPU_MAJOR_ID_G12A, \ 0} #define REGISTER_FOR_GXCPU {\ MESON_CPU_MAJOR_ID_GXBB, \ @@ -36,6 +37,7 @@ MESON_CPU_MAJOR_ID_GXM, \ MESON_CPU_MAJOR_ID_TXL, \ MESON_CPU_MAJOR_ID_TXLX, \ + MESON_CPU_MAJOR_ID_G12A, \ 0} int codec_apb_read(unsigned int reg) { diff --git a/drivers/amlogic/media/common/canvas/canvas_mgr.c b/drivers/amlogic/media/common/canvas/canvas_mgr.c index d564e64..455b512 100644 --- a/drivers/amlogic/media/common/canvas/canvas_mgr.c +++ b/drivers/amlogic/media/common/canvas/canvas_mgr.c @@ -226,8 +226,7 @@ static void canvas_pool_init(void) memset(pool, 0, sizeof(struct canvas_pool)); spin_lock_init(&pool->lock); pool->canvas_max = CANVAS_MAX_NUM; - if (get_meson_cpu_version(MESON_CPU_VERSION_LVL_MAJOR) < - MESON_CPU_MAJOR_ID_M6TV) + if (get_cpu_type() < MESON_CPU_MAJOR_ID_M6TV) pool->canvas_max = 192; pool->next_alloced_index = pool->canvas_max / 2; /* /start at end part index. */ diff --git a/drivers/amlogic/media/common/ge2d/ge2d_io.h b/drivers/amlogic/media/common/ge2d/ge2d_io.h index 8d9c435..55f5b75 100644 --- a/drivers/amlogic/media/common/ge2d/ge2d_io.h +++ b/drivers/amlogic/media/common/ge2d/ge2d_io.h @@ -71,8 +71,7 @@ static uint32_t ge2d_reg_read(unsigned int reg) unsigned int addr = 0; unsigned int val = 0; - if (get_meson_cpu_version(MESON_CPU_VERSION_LVL_MAJOR) - < MESON_CPU_MAJOR_ID_GXBB) + if (get_cpu_type() < MESON_CPU_MAJOR_ID_GXBB) return (uint32_t)aml_read_cbus(reg); addr = GE2DBUS_REG_ADDR(reg); @@ -88,8 +87,7 @@ static void ge2d_reg_write(unsigned int reg, unsigned int val) { unsigned int addr = 0; - if (get_meson_cpu_version(MESON_CPU_VERSION_LVL_MAJOR) - < MESON_CPU_MAJOR_ID_GXBB) { + if (get_cpu_type() < MESON_CPU_MAJOR_ID_GXBB) { aml_write_cbus(reg, val); return; } -- 2.7.4