From 04f69345894dc6f750b25e7cfb1d4240817203a7 Mon Sep 17 00:00:00 2001 From: pvanhout Date: Mon, 13 Feb 2023 10:20:14 +0100 Subject: [PATCH] [DAG] Handle build_vector with all undefs in reduceBuildVecTruncToBitCast While working on D143731 I hit a case where a build_vector with 2 undef operands could be generated (with one undef hidden behind a bitcast). That made `reduceBuildVecTruncToBitCast` crash because it seems to assume there is at least one good operand. Reviewed By: arsenm Differential Revision: https://reviews.llvm.org/D143886 --- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 2 +- llvm/test/CodeGen/AMDGPU/undef-build-vector.ll | 17 +++++++++++++++++ 2 files changed, 18 insertions(+), 1 deletion(-) create mode 100644 llvm/test/CodeGen/AMDGPU/undef-build-vector.ll diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index 00ca9d3434d5..56bf9ae6f34f 100644 --- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -21492,7 +21492,7 @@ SDValue DAGCombiner::reduceBuildVecTruncToBitCast(SDNode *N) { } // Only cast if the size is the same - if (Src.getValueType().getSizeInBits() != VT.getSizeInBits()) + if (!Src || Src.getValueType().getSizeInBits() != VT.getSizeInBits()) return SDValue(); return DAG.getBitcast(VT, Src); diff --git a/llvm/test/CodeGen/AMDGPU/undef-build-vector.ll b/llvm/test/CodeGen/AMDGPU/undef-build-vector.ll new file mode 100644 index 000000000000..f7e39b21862a --- /dev/null +++ b/llvm/test/CodeGen/AMDGPU/undef-build-vector.ll @@ -0,0 +1,17 @@ +; RUN: llc -march=amdgcn < %s | FileCheck %s +; RUN: llc -march=amdgcn -mcpu=tonga < %s | FileCheck %s +; RUN: llc -march=amdgcn -mcpu=gfx900 < %s | FileCheck %s + +; Checks that we don't crash when code produces a build_vector with two undef operands. + +; CHECK: {{^}}buildvector_undefs: +define amdgpu_kernel void @buildvector_undefs(<2 x i16> %in) { +entry: + %i0 = call <16 x i16> @llvm.vector.insert.v16i16.v2i16(<16 x i16> poison, <2 x i16> %in, i64 0) + %i1 = call <16 x i16> @llvm.vector.insert.v16i16.v2i16(<16 x i16> %i0, <2 x i16> zeroinitializer, i64 2) + store <16 x i16> %i1, ptr addrspace(1) null, align 32 + ret void +} + +declare <2 x i16> @llvm.vector.extract.v2i16.v16i16(<16 x i16>, i64 immarg) +declare <16 x i16> @llvm.vector.insert.v16i16.v2i16(<16 x i16>, <2 x i16>, i64 immarg) -- 2.34.1