From 0429b1a431f8cd8dfde96a8b0f09df59611e3291 Mon Sep 17 00:00:00 2001 From: Sanjay Patel Date: Fri, 17 Mar 2017 23:04:18 +0000 Subject: [PATCH] [x86] regenerate checks; NFC llvm-svn: 298166 --- llvm/test/CodeGen/X86/fp128-i128.ll | 251 +++++++++++++++++++++++------------- 1 file changed, 162 insertions(+), 89 deletions(-) diff --git a/llvm/test/CodeGen/X86/fp128-i128.ll b/llvm/test/CodeGen/X86/fp128-i128.ll index a75c932..98082ec 100644 --- a/llvm/test/CodeGen/X86/fp128-i128.ll +++ b/llvm/test/CodeGen/X86/fp128-i128.ll @@ -1,7 +1,6 @@ -; RUN: llc < %s -O2 -mtriple=x86_64-linux-android -mattr=+mmx \ -; RUN: -enable-legalize-types-checking | FileCheck %s -; RUN: llc < %s -O2 -mtriple=x86_64-linux-gnu -mattr=+mmx \ -; RUN: -enable-legalize-types-checking | FileCheck %s +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc < %s -O2 -mtriple=x86_64-linux-android -mattr=+mmx -enable-legalize-types-checking | FileCheck %s +; RUN: llc < %s -O2 -mtriple=x86_64-linux-gnu -mattr=+mmx -enable-legalize-types-checking | FileCheck %s ; These tests were generated from simplified libm C code. ; When compiled for the x86_64-linux-android target, @@ -43,6 +42,19 @@ ; foo(w); ; } define void @TestUnionLD1(fp128 %s, i64 %n) #0 { +; CHECK-LABEL: TestUnionLD1: +; CHECK: # BB#0: # %entry +; CHECK-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp) +; CHECK-NEXT: movq -{{[0-9]+}}(%rsp), %rax +; CHECK-NEXT: movabsq $281474976710655, %rcx # imm = 0xFFFFFFFFFFFF +; CHECK-NEXT: andq %rdi, %rcx +; CHECK-NEXT: movabsq $-281474976710656, %rdx # imm = 0xFFFF000000000000 +; CHECK-NEXT: andq -{{[0-9]+}}(%rsp), %rdx +; CHECK-NEXT: movq %rax, -{{[0-9]+}}(%rsp) +; CHECK-NEXT: orq %rcx, %rdx +; CHECK-NEXT: movq %rdx, -{{[0-9]+}}(%rsp) +; CHECK-NEXT: movaps -{{[0-9]+}}(%rsp), %xmm0 +; CHECK-NEXT: jmp foo # TAILCALL entry: %0 = bitcast fp128 %s to i128 %1 = zext i64 %n to i128 @@ -53,18 +65,6 @@ entry: %2 = bitcast i128 %bf.set to fp128 tail call void @foo(fp128 %2) #2 ret void -; CHECK-LABEL: TestUnionLD1: -; CHECK: movaps %xmm0, -24(%rsp) -; CHECK-NEXT: movq -24(%rsp), %rax -; CHECK-NEXT: movabsq $281474976710655, %rcx -; CHECK-NEXT: andq %rdi, %rcx -; CHECK-NEXT: movabsq $-281474976710656, %rdx -; CHECK-NEXT: andq -16(%rsp), %rdx -; CHECK-NEXT: movq %rax, -40(%rsp) -; CHECK-NEXT: orq %rcx, %rdx -; CHECK-NEXT: movq %rdx, -32(%rsp) -; CHECK-NEXT: movaps -40(%rsp), %xmm0 -; CHECK-NEXT: jmp foo } ; C code: @@ -77,18 +77,19 @@ entry: ; return w; ; } define fp128 @TestUnionLD2(fp128 %s) #0 { +; CHECK-LABEL: TestUnionLD2: +; CHECK: # BB#0: # %entry +; CHECK-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp) +; CHECK-NEXT: movq -{{[0-9]+}}(%rsp), %rax +; CHECK-NEXT: movq %rax, -{{[0-9]+}}(%rsp) +; CHECK-NEXT: movq $0, -{{[0-9]+}}(%rsp) +; CHECK-NEXT: movaps -{{[0-9]+}}(%rsp), %xmm0 +; CHECK-NEXT: retq entry: %0 = bitcast fp128 %s to i128 %bf.clear = and i128 %0, -18446744073709551616 %1 = bitcast i128 %bf.clear to fp128 ret fp128 %1 -; CHECK-LABEL: TestUnionLD2: -; CHECK: movaps %xmm0, -24(%rsp) -; CHECK-NEXT: movq -16(%rsp), %rax -; CHECK-NEXT: movq %rax, -32(%rsp) -; CHECK-NEXT: movq $0, -40(%rsp) -; CHECK-NEXT: movaps -40(%rsp), %xmm0 -; CHECK-NEXT: retq } ; C code: @@ -100,6 +101,25 @@ entry: ; return (z.e < 0.1L) ? 1.0L : 2.0L; ; } define fp128 @TestI128_1(fp128 %x) #0 { +; CHECK-LABEL: TestI128_1: +; CHECK: # BB#0: # %entry +; CHECK-NEXT: subq $40, %rsp +; CHECK-NEXT: movaps %xmm0, {{[0-9]+}}(%rsp) +; CHECK-NEXT: movq {{[0-9]+}}(%rsp), %rax +; CHECK-NEXT: movabsq $9223372036854775807, %rcx # imm = 0x7FFFFFFFFFFFFFFF +; CHECK-NEXT: andq {{[0-9]+}}(%rsp), %rcx +; CHECK-NEXT: movq %rcx, {{[0-9]+}}(%rsp) +; CHECK-NEXT: movq %rax, (%rsp) +; CHECK-NEXT: movaps (%rsp), %xmm0 +; CHECK-NEXT: movaps {{.*}}(%rip), %xmm1 +; CHECK-NEXT: callq __lttf2 +; CHECK-NEXT: xorl %ecx, %ecx +; CHECK-NEXT: testl %eax, %eax +; CHECK-NEXT: sets %cl +; CHECK-NEXT: shlq $4, %rcx +; CHECK-NEXT: movaps {{\.LCPI.*}}(%rcx), %xmm0 +; CHECK-NEXT: addq $40, %rsp +; CHECK-NEXT: retq entry: %0 = bitcast fp128 %x to i128 %bf.clear = and i128 %0, 170141183460469231731687303715884105727 @@ -107,13 +127,6 @@ entry: %cmp = fcmp olt fp128 %1, 0xL999999999999999A3FFB999999999999 %cond = select i1 %cmp, fp128 0xL00000000000000003FFF000000000000, fp128 0xL00000000000000004000000000000000 ret fp128 %cond -; CHECK-LABEL: TestI128_1: -; CHECK: movaps %xmm0, -; CHECK: movabsq $9223372036854775807, -; CHECK: callq __lttf2 -; CHECK: testl %eax, %eax -; CHECK: movaps {{.*}}, %xmm0 -; CHECK: retq } ; C code: @@ -126,17 +139,20 @@ entry: ; return (hx & 0x8000) == 0 ? x : y; ; } define fp128 @TestI128_2(fp128 %x, fp128 %y) #0 { +; CHECK-LABEL: TestI128_2: +; CHECK: # BB#0: # %entry +; CHECK-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp) +; CHECK-NEXT: cmpq $0, -{{[0-9]+}}(%rsp) +; CHECK-NEXT: jns .LBB3_2 +; CHECK-NEXT: # BB#1: # %entry +; CHECK-NEXT: movaps %xmm1, %xmm0 +; CHECK-NEXT: .LBB3_2: # %entry +; CHECK-NEXT: retq entry: %0 = bitcast fp128 %x to i128 %cmp = icmp sgt i128 %0, -1 %cond = select i1 %cmp, fp128 %x, fp128 %y ret fp128 %cond -; CHECK-LABEL: TestI128_2: -; CHECK: movaps %xmm0, -24(%rsp) -; CHECK-NEXT: cmpq $0, -16(%rsp) -; CHECK-NEXT: jns -; CHECK: movaps %xmm1, %xmm0 -; CHECK: retq } ; C code: @@ -151,6 +167,32 @@ entry: ; return (u.e); ; } define fp128 @TestI128_3(fp128 %x, i32* nocapture readnone %ex) #0 { +; CHECK-LABEL: TestI128_3: +; CHECK: # BB#0: # %entry +; CHECK-NEXT: subq $56, %rsp +; CHECK-NEXT: movaps %xmm0, {{[0-9]+}}(%rsp) +; CHECK-NEXT: movq {{[0-9]+}}(%rsp), %rax +; CHECK-NEXT: movabsq $9223090561878065152, %rcx # imm = 0x7FFF000000000000 +; CHECK-NEXT: testq %rcx, %rax +; CHECK-NEXT: je .LBB4_2 +; CHECK-NEXT: # BB#1: +; CHECK-NEXT: movq {{[0-9]+}}(%rsp), %rcx +; CHECK-NEXT: jmp .LBB4_3 +; CHECK-NEXT: .LBB4_2: # %if.then +; CHECK-NEXT: movaps {{.*}}(%rip), %xmm1 +; CHECK-NEXT: callq __multf3 +; CHECK-NEXT: movaps %xmm0, {{[0-9]+}}(%rsp) +; CHECK-NEXT: movq {{[0-9]+}}(%rsp), %rcx +; CHECK-NEXT: movabsq $-9223090561878065153, %rdx # imm = 0x8000FFFFFFFFFFFF +; CHECK-NEXT: andq {{[0-9]+}}(%rsp), %rdx +; CHECK-NEXT: movabsq $4611123068473966592, %rax # imm = 0x3FFE000000000000 +; CHECK-NEXT: orq %rdx, %rax +; CHECK-NEXT: .LBB4_3: # %if.end +; CHECK-NEXT: movq %rcx, (%rsp) +; CHECK-NEXT: movq %rax, {{[0-9]+}}(%rsp) +; CHECK-NEXT: movaps (%rsp), %xmm0 +; CHECK-NEXT: addq $56, %rsp +; CHECK-NEXT: retq entry: %0 = bitcast fp128 %x to i128 %bf.cast = and i128 %0, 170135991163610696904058773219554885632 @@ -168,15 +210,6 @@ if.end: ; preds = %if.then, %entry %u.sroa.0.0 = phi i128 [ %bf.set, %if.then ], [ %0, %entry ] %2 = bitcast i128 %u.sroa.0.0 to fp128 ret fp128 %2 -; CHECK-LABEL: TestI128_3: -; CHECK: movaps %xmm0, -; CHECK: movabsq $9223090561878065152, -; CHECK: testq -; CHECK: callq __multf3 -; CHECK-NEXT: movaps %xmm0 -; CHECK: movabsq $-9223090561878065153, -; CHECK: movabsq $4611123068473966592, -; CHECK: retq } ; C code: @@ -190,21 +223,24 @@ if.end: ; preds = %if.then, %entry ; return x + df; ; } define fp128 @TestI128_4(fp128 %x) #0 { +; CHECK-LABEL: TestI128_4: +; CHECK: # BB#0: # %entry +; CHECK-NEXT: subq $40, %rsp +; CHECK-NEXT: movaps %xmm0, %xmm1 +; CHECK-NEXT: movaps %xmm1, {{[0-9]+}}(%rsp) +; CHECK-NEXT: movq {{[0-9]+}}(%rsp), %rax +; CHECK-NEXT: movq %rax, {{[0-9]+}}(%rsp) +; CHECK-NEXT: movq $0, (%rsp) +; CHECK-NEXT: movaps (%rsp), %xmm0 +; CHECK-NEXT: callq __addtf3 +; CHECK-NEXT: addq $40, %rsp +; CHECK-NEXT: retq entry: %0 = bitcast fp128 %x to i128 %bf.clear = and i128 %0, -18446744073709551616 %1 = bitcast i128 %bf.clear to fp128 %add = fadd fp128 %1, %x ret fp128 %add -; CHECK-LABEL: TestI128_4: -; CHECK: movaps %xmm0, %xmm1 -; CHECK-NEXT: movaps %xmm1, 16(%rsp) -; CHECK-NEXT: movq 24(%rsp), %rax -; CHECK-NEXT: movq %rax, 8(%rsp) -; CHECK-NEXT: movq $0, (%rsp) -; CHECK-NEXT: movaps (%rsp), %xmm0 -; CHECK-NEXT: callq __addtf3 -; CHECK: retq } @v128 = common global i128 0, align 16 @@ -216,6 +252,15 @@ entry: ; v128 = ((v128 << 96) | v128_2); ; } define void @TestShift128_2() #2 { +; CHECK-LABEL: TestShift128_2: +; CHECK: # BB#0: # %entry +; CHECK-NEXT: movq {{.*}}(%rip), %rax +; CHECK-NEXT: shlq $32, %rax +; CHECK-NEXT: movq {{.*}}(%rip), %rcx +; CHECK-NEXT: orq v128_2+{{.*}}(%rip), %rax +; CHECK-NEXT: movq %rcx, {{.*}}(%rip) +; CHECK-NEXT: movq %rax, v128+{{.*}}(%rip) +; CHECK-NEXT: retq entry: %0 = load i128, i128* @v128, align 16 %shl = shl i128 %0, 96 @@ -223,59 +268,58 @@ entry: %or = or i128 %shl, %1 store i128 %or, i128* @v128, align 16 ret void -; CHECK-LABEL: TestShift128_2: -; CHECK: movq v128(%rip), %rax -; CHECK-NEXT: shlq $32, %rax -; CHECK-NEXT: movq v128_2(%rip), %rcx -; CHECK-NEXT: orq v128_2+8(%rip), %rax -; CHECK-NEXT: movq %rcx, v128(%rip) -; CHECK-NEXT: movq %rax, v128+8(%rip) -; CHECK-NEXT: retq } define fp128 @acosl(fp128 %x) #0 { +; CHECK-LABEL: acosl: +; CHECK: # BB#0: # %entry +; CHECK-NEXT: subq $40, %rsp +; CHECK-NEXT: movaps %xmm0, %xmm1 +; CHECK-NEXT: movaps %xmm1, {{[0-9]+}}(%rsp) +; CHECK-NEXT: movq {{[0-9]+}}(%rsp), %rax +; CHECK-NEXT: movq %rax, {{[0-9]+}}(%rsp) +; CHECK-NEXT: movq $0, (%rsp) +; CHECK-NEXT: movaps (%rsp), %xmm0 +; CHECK-NEXT: callq __addtf3 +; CHECK-NEXT: addq $40, %rsp +; CHECK-NEXT: retq entry: %0 = bitcast fp128 %x to i128 %bf.clear = and i128 %0, -18446744073709551616 %1 = bitcast i128 %bf.clear to fp128 %add = fadd fp128 %1, %x ret fp128 %add -; CHECK-LABEL: acosl: -; CHECK: movaps %xmm0, %xmm1 -; CHECK-NEXT: movaps %xmm1, 16(%rsp) -; CHECK-NEXT: movq 24(%rsp), %rax -; CHECK-NEXT: movq %rax, 8(%rsp) -; CHECK-NEXT: movq $0, (%rsp) -; CHECK-NEXT: movaps (%rsp), %xmm0 -; CHECK-NEXT: callq __addtf3 -; CHECK: retq } ; Compare i128 values and check i128 constants. define fp128 @TestComp(fp128 %x, fp128 %y) #0 { +; CHECK-LABEL: TestComp: +; CHECK: # BB#0: # %entry +; CHECK-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp) +; CHECK-NEXT: cmpq $0, -{{[0-9]+}}(%rsp) +; CHECK-NEXT: jns .LBB8_2 +; CHECK-NEXT: # BB#1: # %entry +; CHECK-NEXT: movaps %xmm1, %xmm0 +; CHECK-NEXT: .LBB8_2: # %entry +; CHECK-NEXT: retq entry: %0 = bitcast fp128 %x to i128 %cmp = icmp sgt i128 %0, -1 %cond = select i1 %cmp, fp128 %x, fp128 %y ret fp128 %cond -; CHECK-LABEL: TestComp: -; CHECK: movaps %xmm0, -24(%rsp) -; CHECK-NEXT: cmpq $0, -16(%rsp) -; CHECK-NEXT: jns -; CHECK: movaps %xmm1, %xmm0 -; CHECK: retq } declare void @foo(fp128) #1 ; Test logical operations on fp128 values. define fp128 @TestFABS_LD(fp128 %x) #0 { +; CHECK-LABEL: TestFABS_LD: +; CHECK: # BB#0: # %entry +; CHECK-NEXT: andps {{.*}}(%rip), %xmm0 +; CHECK-NEXT: retq entry: %call = tail call fp128 @fabsl(fp128 %x) #2 ret fp128 %call -; CHECK-LABEL: TestFABS_LD -; CHECK: andps {{.*}}, %xmm0 -; CHECK-NEXT: retq } declare fp128 @fabsl(fp128) #1 @@ -284,6 +328,43 @@ declare fp128 @copysignl(fp128, fp128) #1 ; Test more complicated logical operations generated from copysignl. define void @TestCopySign({ fp128, fp128 }* noalias nocapture sret %agg.result, { fp128, fp128 }* byval nocapture readonly align 16 %z) #0 { +; CHECK-LABEL: TestCopySign: +; CHECK: # BB#0: # %entry +; CHECK-NEXT: pushq %rbp +; CHECK-NEXT: pushq %rbx +; CHECK-NEXT: subq $40, %rsp +; CHECK-NEXT: movq %rdi, %rbx +; CHECK-NEXT: movaps {{[0-9]+}}(%rsp), %xmm0 +; CHECK-NEXT: movaps {{[0-9]+}}(%rsp), %xmm1 +; CHECK-NEXT: movaps %xmm1, {{[0-9]+}}(%rsp) # 16-byte Spill +; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill +; CHECK-NEXT: callq __gttf2 +; CHECK-NEXT: movl %eax, %ebp +; CHECK-NEXT: movaps {{[0-9]+}}(%rsp), %xmm0 # 16-byte Reload +; CHECK-NEXT: movaps %xmm0, %xmm1 +; CHECK-NEXT: callq __subtf3 +; CHECK-NEXT: testl %ebp, %ebp +; CHECK-NEXT: jle .LBB10_1 +; CHECK-NEXT: # BB#2: # %if.then +; CHECK-NEXT: andps {{.*}}(%rip), %xmm0 +; CHECK-NEXT: movaps %xmm0, %xmm1 +; CHECK-NEXT: movaps (%rsp), %xmm0 # 16-byte Reload +; CHECK-NEXT: movaps %xmm1, %xmm2 +; CHECK-NEXT: jmp .LBB10_3 +; CHECK-NEXT: .LBB10_1: +; CHECK-NEXT: movaps (%rsp), %xmm2 # 16-byte Reload +; CHECK-NEXT: .LBB10_3: # %cleanup +; CHECK-NEXT: movaps {{.*}}(%rip), %xmm1 +; CHECK-NEXT: andps {{[0-9]+}}(%rsp), %xmm1 # 16-byte Folded Reload +; CHECK-NEXT: andps {{.*}}(%rip), %xmm0 +; CHECK-NEXT: orps %xmm1, %xmm0 +; CHECK-NEXT: movaps %xmm2, (%rbx) +; CHECK-NEXT: movaps %xmm0, 16(%rbx) +; CHECK-NEXT: movq %rbx, %rax +; CHECK-NEXT: addq $40, %rsp +; CHECK-NEXT: popq %rbx +; CHECK-NEXT: popq %rbp +; CHECK-NEXT: retq entry: %z.realp = getelementptr inbounds { fp128, fp128 }, { fp128, fp128 }* %z, i64 0, i32 0 %z.real = load fp128, fp128* %z.realp, align 16 @@ -306,17 +387,9 @@ cleanup: ; preds = %entry, %if.then store fp128 %call.sink, fp128* %0, align 16 store fp128 %call5, fp128* %1, align 16 ret void -; CHECK-LABEL: TestCopySign -; CHECK-NOT: call -; CHECK: callq __gttf2 -; CHECK-NOT: call -; CHECK: callq __subtf3 -; CHECK-NOT: call -; CHECK: andps {{.*}}, %xmm0 -; CHECK: retq } -attributes #0 = { nounwind uwtable "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+ssse3,+sse3,+popcnt,+sse,+sse2,+sse4.1,+sse4.2" "unsafe-fp-math"="false" "use-soft-float"="false" } +attributes #0 = { nounwind "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+ssse3,+sse3,+popcnt,+sse,+sse2,+sse4.1,+sse4.2" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #1 = { "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+ssse3,+sse3,+popcnt,+sse,+sse2,+sse4.1,+sse4.2" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #2 = { nounwind readnone } -- 2.7.4