From 03eb813dac25d478151892e959055a80b9eb7dbe Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Wed, 8 Dec 2021 21:17:55 +0800 Subject: [PATCH] arm64: dts: imx8ulp: add power domain entry for usdhc Add power domain for USDHC node. Signed-off-by: Peng Fan Signed-off-by: Shawn Guo --- arch/arm64/boot/dts/freescale/imx8ulp.dtsi | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi index 8ee040e..a987ff7 100644 --- a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi @@ -329,6 +329,7 @@ <&cgc1 IMX8ULP_CLK_XBAR_AD_DIVPLAT>, <&pcc4 IMX8ULP_CLK_USDHC0>; clock-names = "ipg", "ahb", "per"; + power-domains = <&scmi_devpd IMX8ULP_PD_USDHC0>; fsl,tuning-start-tap = <20>; fsl,tuning-step= <2>; bus-width = <4>; @@ -343,6 +344,7 @@ <&cgc1 IMX8ULP_CLK_NIC_PER_DIVPLAT>, <&pcc4 IMX8ULP_CLK_USDHC1>; clock-names = "ipg", "ahb", "per"; + power-domains = <&scmi_devpd IMX8ULP_PD_USDHC1>; fsl,tuning-start-tap = <20>; fsl,tuning-step= <2>; bus-width = <4>; @@ -357,6 +359,7 @@ <&cgc1 IMX8ULP_CLK_NIC_PER_DIVPLAT>, <&pcc4 IMX8ULP_CLK_USDHC2>; clock-names = "ipg", "ahb", "per"; + power-domains = <&scmi_devpd IMX8ULP_PD_USDHC2_USB1>; fsl,tuning-start-tap = <20>; fsl,tuning-step= <2>; bus-width = <4>; -- 2.7.4