From 03dbfc2eefdbac5e3bc464b279e751c4f39b28f2 Mon Sep 17 00:00:00 2001 From: Nikita Popov Date: Wed, 20 Mar 2019 21:42:17 +0000 Subject: [PATCH] [InstCombine] Add additional sub nsw inference tests; NFC nsw can be determined based on known bits here, but currently isn't. llvm-svn: 356620 --- llvm/test/Transforms/InstCombine/sub.ll | 30 ++++++++++++++++++++++++++++-- 1 file changed, 28 insertions(+), 2 deletions(-) diff --git a/llvm/test/Transforms/InstCombine/sub.ll b/llvm/test/Transforms/InstCombine/sub.ll index dd9fadf..9b10017 100644 --- a/llvm/test/Transforms/InstCombine/sub.ll +++ b/llvm/test/Transforms/InstCombine/sub.ll @@ -631,7 +631,7 @@ define <2 x i32> @test27commutedvecmixed(<2 x i32> %x, <2 x i32> %y) { define i32 @test28(i32 %x, i32 %y, i32 %z) { ; CHECK-LABEL: @test28( -; CHECK-NEXT: [[TMP1:%.*]] = mul i32 [[Y:%.*]], [[Z:%.*]] +; CHECK-NEXT: [[TMP1:%.*]] = mul i32 [[Z:%.*]], [[Y:%.*]] ; CHECK-NEXT: [[SUB:%.*]] = add i32 [[TMP1]], [[X:%.*]] ; CHECK-NEXT: ret i32 [[SUB]] ; @@ -643,7 +643,7 @@ define i32 @test28(i32 %x, i32 %y, i32 %z) { define i32 @test28commuted(i32 %x, i32 %y, i32 %z) { ; CHECK-LABEL: @test28commuted( -; CHECK-NEXT: [[TMP1:%.*]] = mul i32 [[Y:%.*]], [[Z:%.*]] +; CHECK-NEXT: [[TMP1:%.*]] = mul i32 [[Z:%.*]], [[Y:%.*]] ; CHECK-NEXT: [[SUB:%.*]] = add i32 [[TMP1]], [[X:%.*]] ; CHECK-NEXT: ret i32 [[SUB]] ; @@ -1266,3 +1266,29 @@ define <2 x i32> @test69(<2 x i32> %x) { %res = sub <2 x i32> zeroinitializer, %3 ret <2 x i32> %res } + +define i32 @nsw_inference1(i32 %x, i32 %y) { +; CHECK-LABEL: @nsw_inference1( +; CHECK-NEXT: [[X2:%.*]] = or i32 [[X:%.*]], 1024 +; CHECK-NEXT: [[Y2:%.*]] = and i32 [[Y:%.*]], 1 +; CHECK-NEXT: [[Z:%.*]] = sub nuw i32 [[X2]], [[Y2]] +; CHECK-NEXT: ret i32 [[Z]] +; + %x2 = or i32 %x, 1024 + %y2 = and i32 %y, 1 + %z = sub i32 %x2, %y2 + ret i32 %z +} + +define i32 @nsw_inference2(i32 %x, i32 %y) { +; CHECK-LABEL: @nsw_inference2( +; CHECK-NEXT: [[X2:%.*]] = and i32 [[X:%.*]], -1025 +; CHECK-NEXT: [[Y2:%.*]] = or i32 [[Y:%.*]], -2 +; CHECK-NEXT: [[Z:%.*]] = sub i32 [[X2]], [[Y2]] +; CHECK-NEXT: ret i32 [[Z]] +; + %x2 = and i32 %x, -1025 + %y2 = or i32 %y, -2 + %z = sub i32 %x2, %y2 + ret i32 %z +} -- 2.7.4