From 039eee3f12e0a2865c2b4bf67ebe4f3ceab8b52a Mon Sep 17 00:00:00 2001 From: Jakub Jelinek Date: Fri, 3 Jan 2014 11:51:42 +0100 Subject: [PATCH] i386.md (MODE_SIZE): New mode attribute. * config/i386/i386.md (MODE_SIZE): New mode attribute. (push splitter): Use instead of GET_MODE_SIZE (mode). (lea splitter): Use instead of GET_MODE_SIZE (mode). (mov -1, reg peephole2): Likewise. * config/i386/sse.md (*mov_internal, _storeu, _storedqu, _andnot3, *3, *andnot3, 3): Likewise. * config/i386/subst.md (mask_mode512bit_condition, sd_mask_mode512bit_condition): Likewise. From-SVN: r206312 --- gcc/ChangeLog | 18 ++++++++++++++++-- gcc/config/i386/i386.md | 20 +++++++++++++++++--- gcc/config/i386/sse.md | 24 ++++++++++++------------ gcc/config/i386/subst.md | 4 ++-- 4 files changed, 47 insertions(+), 19 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index bfe89d4..e4d71d7 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,8 +1,22 @@ +2014-01-03 Jakub Jelinek + + * config/i386/i386.md (MODE_SIZE): New mode attribute. + (push splitter): Use instead of + GET_MODE_SIZE (mode). + (lea splitter): Use instead of GET_MODE_SIZE (mode). + (mov -1, reg peephole2): Likewise. + * config/i386/sse.md (*mov_internal, + _storeu, + _storedqu, _andnot3, + *3, *andnot3, + 3): Likewise. + * config/i386/subst.md (mask_mode512bit_condition, + sd_mask_mode512bit_condition): Likewise. + 2014-01-02 Xinliang David Li PR tree-optimization/59303 - * tree-ssa-uninit.c (is_use_properly_guarded): - Main cleanup. + * tree-ssa-uninit.c (is_use_properly_guarded): Main cleanup. (dump_predicates): Better output format. (pred_equal_p): New function. (is_neq_relop_p): Ditto. diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index a3f0c28..de0b2dd 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -914,6 +914,20 @@ (define_mode_iterator DWI [(DI "!TARGET_64BIT") (TI "TARGET_64BIT")]) +;; GET_MODE_SIZE for selected modes. As GET_MODE_SIZE is not +;; compile time constant, it is faster to use than +;; GET_MODE_SIZE (mode). For XFmode which depends on +;; command line options just use GET_MODE_SIZE macro. +(define_mode_attr MODE_SIZE [(QI "1") (HI "2") (SI "4") (DI "8") (TI "16") + (SF "4") (DF "8") (XF "GET_MODE_SIZE (XFmode)") + (V16QI "16") (V32QI "32") (V64QI "64") + (V8HI "16") (V16HI "32") (V32HI "64") + (V4SI "16") (V8SI "32") (V16SI "64") + (V2DI "16") (V4DI "32") (V8DI "64") + (V1TI "16") (V2TI "32") (V4TI "64") + (V2DF "16") (V4DF "32") (V8DF "64") + (V4SF "16") (V8SF "32") (V16SF "64")]) + ;; Double word integer modes as mode attribute. (define_mode_attr DWI [(QI "HI") (HI "SI") (SI "DI") (DI "TI")]) (define_mode_attr dwi [(QI "hi") (HI "si") (SI "di") (DI "ti")]) @@ -2734,7 +2748,7 @@ "reload_completed" [(set (reg:P SP_REG) (plus:P (reg:P SP_REG) (match_dup 2))) (set (mem:SF (reg:P SP_REG)) (match_dup 1))] - "operands[2] = GEN_INT (-GET_MODE_SIZE (mode));") + "operands[2] = GEN_INT (-);") (define_split [(set (match_operand:SF 0 "push_operand") @@ -5770,7 +5784,7 @@ enum machine_mode mode = mode; rtx pat; - if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (SImode)) + if ( < GET_MODE_SIZE (SImode)) { mode = SImode; operands[0] = gen_lowpart (mode, operands[0]); @@ -17403,7 +17417,7 @@ [(parallel [(set (match_dup 0) (const_int -1)) (clobber (reg:CC FLAGS_REG))])] { - if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (SImode)) + if ( < GET_MODE_SIZE (SImode)) operands[0] = gen_lowpart (SImode, operands[0]); }) diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 3016ef6..405f998 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -669,7 +669,7 @@ /* There is no evex-encoded vmov* for sizes smaller than 64-bytes in avx512f, so we need to use workarounds, to access sse registers 16-31, which are evex-only. */ - if (TARGET_AVX512F && GET_MODE_SIZE (mode) < 64 + if (TARGET_AVX512F && < 64 && ((REG_P (operands[0]) && EXT_REX_SSE_REGNO_P (REGNO (operands[0]))) || (REG_P (operands[1]) @@ -677,18 +677,18 @@ { if (memory_operand (operands[0], mode)) { - if (GET_MODE_SIZE (mode) == 32) + if ( == 32) return "vextract64x4\t{$0x0, %g1, %0|%0, %g1, 0x0}"; - else if (GET_MODE_SIZE (mode) == 16) + else if ( == 16) return "vextract32x4\t{$0x0, %g1, %0|%0, %g1, 0x0}"; else gcc_unreachable (); } else if (memory_operand (operands[1], mode)) { - if (GET_MODE_SIZE (mode) == 32) + if ( == 32) return "vbroadcast64x4\t{%1, %g0|%g0, %1}"; - else if (GET_MODE_SIZE (mode) == 16) + else if ( == 16) return "vbroadcast32x4\t{%1, %g0|%g0, %1}"; else gcc_unreachable (); @@ -759,7 +759,7 @@ (set (attr "mode") (cond [(match_test "TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL") (const_string "") - (and (match_test "GET_MODE_SIZE (mode) == 16") + (and (match_test " == 16") (and (eq_attr "alternative" "2") (match_test "TARGET_SSE_TYPELESS_STORES"))) (const_string "") @@ -998,7 +998,7 @@ (set_attr "ssememalign" "8") (set_attr "prefix" "maybe_vex") (set (attr "mode") - (cond [(and (match_test "GET_MODE_SIZE (mode) == 16") + (cond [(and (match_test " == 16") (ior (match_test "TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL") (match_test "TARGET_SSE_TYPELESS_STORES"))) (const_string "") @@ -1127,7 +1127,7 @@ (const_string "1"))) (set_attr "prefix" "maybe_vex") (set (attr "mode") - (cond [(and (match_test "GET_MODE_SIZE (mode) == 16") + (cond [(and (match_test " == 16") (ior (match_test "TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL") (match_test "TARGET_SSE_TYPELESS_STORES"))) (const_string "") @@ -2363,7 +2363,7 @@ } /* There is no vandnp[sd]. Use vpandnq. */ - if (GET_MODE_SIZE (mode) == 64) + if ( == 64) { suffix = "q"; ops = "vpandn%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; @@ -2435,7 +2435,7 @@ } /* There is no vp[sd]. Use vpq. */ - if (GET_MODE_SIZE (mode) == 64) + if ( == 64) { suffix = "q"; ops = "vp%s\t{%%2, %%1, %%0|%%0, %%1, %%2}"; @@ -8940,7 +8940,7 @@ (const_string "") (match_test "TARGET_AVX") (if_then_else - (match_test "GET_MODE_SIZE (mode) > 16") + (match_test " > 16") (const_string "V8SF") (const_string "")) (ior (not (match_test "TARGET_SSE2")) @@ -9032,7 +9032,7 @@ (const_string "") (match_test "TARGET_AVX") (if_then_else - (match_test "GET_MODE_SIZE (mode) > 16") + (match_test " > 16") (const_string "V8SF") (const_string "")) (ior (not (match_test "TARGET_SSE2")) diff --git a/gcc/config/i386/subst.md b/gcc/config/i386/subst.md index 1c177ac..7fd3948 100644 --- a/gcc/config/i386/subst.md +++ b/gcc/config/i386/subst.md @@ -51,7 +51,7 @@ (define_subst_attr "mask_operand18" "mask" "" "%{%19%}%N18") (define_subst_attr "mask_operand19" "mask" "" "%{%20%}%N19") (define_subst_attr "mask_codefor" "mask" "*" "") -(define_subst_attr "mask_mode512bit_condition" "mask" "1" "(GET_MODE_SIZE (mode) == 64)") +(define_subst_attr "mask_mode512bit_condition" "mask" "1" "( == 64)") (define_subst_attr "store_mask_constraint" "mask" "vm" "v") (define_subst_attr "store_mask_predicate" "mask" "nonimmediate_operand" "register_operand") (define_subst_attr "mask_prefix" "mask" "vex" "evex") @@ -85,7 +85,7 @@ (define_subst_attr "sd_mask_op4" "sd" "" "%{%5%}%N4") (define_subst_attr "sd_mask_op5" "sd" "" "%{%6%}%N5") (define_subst_attr "sd_mask_codefor" "sd" "*" "") -(define_subst_attr "sd_mask_mode512bit_condition" "sd" "1" "(GET_MODE_SIZE (mode) == 64)") +(define_subst_attr "sd_mask_mode512bit_condition" "sd" "1" "( == 64)") (define_subst "sd" [(set (match_operand:SUBST_V 0) -- 2.7.4