From 02b2c024193b1985d85855a7f85b98aef9ebbcdb Mon Sep 17 00:00:00 2001 From: Jinsong Ji Date: Wed, 9 Dec 2020 03:15:45 +0000 Subject: [PATCH] [PowerPC] Precommit testcases for regpressure compute fix --- llvm/test/CodeGen/PowerPC/compute-regpressure.ll | 30 ++++++++++++++++++++++++ 1 file changed, 30 insertions(+) create mode 100644 llvm/test/CodeGen/PowerPC/compute-regpressure.ll diff --git a/llvm/test/CodeGen/PowerPC/compute-regpressure.ll b/llvm/test/CodeGen/PowerPC/compute-regpressure.ll new file mode 100644 index 0000000..7a15e46 --- /dev/null +++ b/llvm/test/CodeGen/PowerPC/compute-regpressure.ll @@ -0,0 +1,30 @@ +; REQUIRES: asserts +; RUN: llc -debug-only=regalloc < %s 2>&1 |FileCheck %s --check-prefix=DEBUG + +; DEBUG-COUNT-3: AllocationOrder(VRSAVERC) = [ ] + +target triple = "powerpc64le-unknown-linux-gnu" + +define hidden fastcc void @test() { +freescalar: + %0 = load i32, i32* undef, align 4 + br label %if.end420 + +if.end420: ; preds = %freescalar + br label %free_rv + +free_rv: ; preds = %if.end420 + %and427 = and i32 %0, -2147481600 + %cmp428 = icmp eq i32 %and427, -2147481600 + br i1 %cmp428, label %if.then430, label %free_body + +if.then430: ; preds = %free_rv + call fastcc void undef() + br label %free_body + +free_body: ; preds = %if.then430, %free_rv + %or502 = or i32 undef, 255 + store i32 %or502, i32* undef, align 4 + ret void +} + -- 2.7.4