From 02b02cd050273bae5c6d3e5f9f6a30067839bff6 Mon Sep 17 00:00:00 2001 From: Nikita Popov Date: Tue, 3 Jan 2023 13:45:52 +0100 Subject: [PATCH] [CodeGenPrepare] Avoid branch on undef UB in tests (NFC) --- .../CodeGenPrepare/AArch64/large-offset-gep.ll | 23 +++++++++-------- .../AArch64/sink-free-instructions-inseltpoison.ll | 24 ++++++++--------- .../AArch64/sink-free-instructions.ll | 30 +++++++++++----------- .../ARM/sink-free-instructions-inseltpoison.ll | 8 +++--- .../CodeGenPrepare/ARM/sink-free-instructions.ll | 8 +++--- llvm/test/Transforms/CodeGenPrepare/X86/pr35658.ll | 2 +- .../CodeGenPrepare/X86/split-indirect-loop.ll | 4 +-- .../CodeGenPrepare/X86/switch-phi-const.ll | 12 ++++----- 8 files changed, 57 insertions(+), 54 deletions(-) diff --git a/llvm/test/Transforms/CodeGenPrepare/AArch64/large-offset-gep.ll b/llvm/test/Transforms/CodeGenPrepare/AArch64/large-offset-gep.ll index 5201247..9d8ef90 100644 --- a/llvm/test/Transforms/CodeGenPrepare/AArch64/large-offset-gep.ll +++ b/llvm/test/Transforms/CodeGenPrepare/AArch64/large-offset-gep.ll @@ -258,29 +258,32 @@ while_end: declare ptr @llvm.strip.invariant.group.p0(ptr) -define void @test_invariant_group(i32 %arg) { +define void @test_invariant_group(i32 %arg, i1 %c) { ; CHECK-LABEL: test_invariant_group: ; CHECK: // %bb.0: // %bb -; CHECK-NEXT: cbz wzr, .LBB5_2 +; CHECK-NEXT: tbz w1, #0, .LBB5_3 ; CHECK-NEXT: // %bb.1: // %bb6 -; CHECK-NEXT: cbz w0, .LBB5_3 -; CHECK-NEXT: .LBB5_2: // %bb5 +; CHECK-NEXT: cbz w0, .LBB5_4 +; CHECK-NEXT: .LBB5_2: // %bb1 +; CHECK-NEXT: // =>This Inner Loop Header: Depth=1 +; CHECK-NEXT: tbnz w1, #0, .LBB5_2 +; CHECK-NEXT: .LBB5_3: // %bb5 ; CHECK-NEXT: ret -; CHECK-NEXT: .LBB5_3: // %bb2 -; CHECK-NEXT: cbnz wzr, .LBB5_2 -; CHECK-NEXT: // %bb.4: // %bb4 +; CHECK-NEXT: .LBB5_4: // %bb2 +; CHECK-NEXT: tbnz w1, #0, .LBB5_3 +; CHECK-NEXT: // %bb.5: // %bb4 ; CHECK-NEXT: mov w8, #1 ; CHECK-NEXT: str x8, [x8] ; CHECK-NEXT: ret bb: - br i1 undef, label %bb6, label %bb5 + br i1 %c, label %bb6, label %bb5 bb1: ; preds = %bb6, %bb1 - br i1 undef, label %bb1, label %bb5 + br i1 %c, label %bb1, label %bb5 bb2: ; preds = %bb6 %i = getelementptr inbounds i8, ptr %i7, i32 40000 - br i1 undef, label %bb5, label %bb4 + br i1 %c, label %bb5, label %bb4 bb4: ; preds = %bb2 store i64 1, ptr %i, align 8 diff --git a/llvm/test/Transforms/CodeGenPrepare/AArch64/sink-free-instructions-inseltpoison.ll b/llvm/test/Transforms/CodeGenPrepare/AArch64/sink-free-instructions-inseltpoison.ll index 04c94eb..566f195 100644 --- a/llvm/test/Transforms/CodeGenPrepare/AArch64/sink-free-instructions-inseltpoison.ll +++ b/llvm/test/Transforms/CodeGenPrepare/AArch64/sink-free-instructions-inseltpoison.ll @@ -119,10 +119,10 @@ if.else: } ; The masks used are suitable for umull, sink shufflevector to users. -define <8 x i16> @sink_shufflevector_umull(<16 x i8> %a, <16 x i8> %b) { +define <8 x i16> @sink_shufflevector_umull(<16 x i8> %a, <16 x i8> %b, i1 %c) { ; CHECK-LABEL: @sink_shufflevector_umull( ; CHECK-NEXT: entry: -; CHECK-NEXT: br i1 undef, label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]] +; CHECK-NEXT: br i1 [[C:%.*]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]] ; CHECK: if.then: ; CHECK-NEXT: [[TMP0:%.*]] = shufflevector <16 x i8> [[A:%.*]], <16 x i8> poison, <8 x i32> ; CHECK-NEXT: [[S2:%.*]] = shufflevector <16 x i8> [[B:%.*]], <16 x i8> poison, <8 x i32> @@ -137,7 +137,7 @@ define <8 x i16> @sink_shufflevector_umull(<16 x i8> %a, <16 x i8> %b) { entry: %s1 = shufflevector <16 x i8> %a, <16 x i8> poison, <8 x i32> %s3 = shufflevector <16 x i8> %a, <16 x i8> poison, <8 x i32> - br i1 undef, label %if.then, label %if.else + br i1 %c, label %if.then, label %if.else if.then: %s2 = shufflevector <16 x i8> %b, <16 x i8> poison, <8 x i32> @@ -151,10 +151,10 @@ if.else: } ; Both exts and their shufflevector operands can be sunk. -define <8 x i16> @sink_shufflevector_ext_subadd(<16 x i8> %a, <16 x i8> %b) { +define <8 x i16> @sink_shufflevector_ext_subadd(<16 x i8> %a, <16 x i8> %b, i1 %c) { ; CHECK-LABEL: @sink_shufflevector_ext_subadd( ; CHECK-NEXT: entry: -; CHECK-NEXT: br i1 undef, label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]] +; CHECK-NEXT: br i1 [[C:%.*]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]] ; CHECK: if.then: ; CHECK-NEXT: [[TMP0:%.*]] = shufflevector <16 x i8> [[A:%.*]], <16 x i8> poison, <8 x i32> ; CHECK-NEXT: [[TMP1:%.*]] = zext <8 x i8> [[TMP0]] to <8 x i16> @@ -175,7 +175,7 @@ entry: %z1 = zext <8 x i8> %s1 to <8 x i16> %s3 = shufflevector <16 x i8> %a, <16 x i8> poison, <8 x i32> %z3 = sext <8 x i8> %s3 to <8 x i16> - br i1 undef, label %if.then, label %if.else + br i1 %c, label %if.then, label %if.else if.then: %s2 = shufflevector <16 x i8> %b, <16 x i8> poison, <8 x i32> @@ -194,13 +194,13 @@ if.else: declare void @user1(<8 x i16>) ; Both exts and their shufflevector operands can be sunk. -define <8 x i16> @sink_shufflevector_ext_subadd_multiuse(<16 x i8> %a, <16 x i8> %b) { +define <8 x i16> @sink_shufflevector_ext_subadd_multiuse(<16 x i8> %a, <16 x i8> %b, i1 %c) { ; CHECK-LABEL: @sink_shufflevector_ext_subadd_multiuse( ; CHECK-NEXT: entry: ; CHECK-NEXT: [[S3:%.*]] = shufflevector <16 x i8> [[A:%.*]], <16 x i8> poison, <8 x i32> ; CHECK-NEXT: [[Z3:%.*]] = sext <8 x i8> [[S3]] to <8 x i16> ; CHECK-NEXT: call void @user1(<8 x i16> [[Z3]]) -; CHECK-NEXT: br i1 undef, label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]] +; CHECK-NEXT: br i1 [[C:%.*]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]] ; CHECK: if.then: ; CHECK-NEXT: [[TMP0:%.*]] = shufflevector <16 x i8> [[A]], <16 x i8> poison, <8 x i32> ; CHECK-NEXT: [[TMP1:%.*]] = zext <8 x i8> [[TMP0]] to <8 x i16> @@ -222,7 +222,7 @@ entry: %s3 = shufflevector <16 x i8> %a, <16 x i8> poison, <8 x i32> %z3 = sext <8 x i8> %s3 to <8 x i16> call void @user1(<8 x i16> %z3) - br i1 undef, label %if.then, label %if.else + br i1 %c, label %if.then, label %if.else if.then: %s2 = shufflevector <16 x i8> %b, <16 x i8> poison, <8 x i32> @@ -239,12 +239,12 @@ if.else: ; The masks used are not suitable for umull, do not sink. -define <8 x i16> @no_sink_shufflevector_umull(<16 x i8> %a, <16 x i8> %b) { +define <8 x i16> @no_sink_shufflevector_umull(<16 x i8> %a, <16 x i8> %b, i1 %c) { ; CHECK-LABEL: @no_sink_shufflevector_umull( ; CHECK-NEXT: entry: ; CHECK-NEXT: [[S1:%.*]] = shufflevector <16 x i8> [[A:%.*]], <16 x i8> poison, <8 x i32> ; CHECK-NEXT: [[S3:%.*]] = shufflevector <16 x i8> [[A]], <16 x i8> poison, <8 x i32> -; CHECK-NEXT: br i1 undef, label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]] +; CHECK-NEXT: br i1 [[C:%.*]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]] ; CHECK: if.then: ; CHECK-NEXT: [[S2:%.*]] = shufflevector <16 x i8> [[B:%.*]], <16 x i8> poison, <8 x i32> ; CHECK-NEXT: [[VMULL0:%.*]] = tail call <8 x i16> @llvm.aarch64.neon.umull.v8i16(<8 x i8> [[S1]], <8 x i8> [[S2]]) @@ -257,7 +257,7 @@ define <8 x i16> @no_sink_shufflevector_umull(<16 x i8> %a, <16 x i8> %b) { entry: %s1 = shufflevector <16 x i8> %a, <16 x i8> poison, <8 x i32> %s3 = shufflevector <16 x i8> %a, <16 x i8> poison, <8 x i32> - br i1 undef, label %if.then, label %if.else + br i1 %c, label %if.then, label %if.else if.then: %s2 = shufflevector <16 x i8> %b, <16 x i8> poison, <8 x i32> diff --git a/llvm/test/Transforms/CodeGenPrepare/AArch64/sink-free-instructions.ll b/llvm/test/Transforms/CodeGenPrepare/AArch64/sink-free-instructions.ll index fc60b11..039d098 100644 --- a/llvm/test/Transforms/CodeGenPrepare/AArch64/sink-free-instructions.ll +++ b/llvm/test/Transforms/CodeGenPrepare/AArch64/sink-free-instructions.ll @@ -120,10 +120,10 @@ if.else: } ; The masks used are suitable for umull, sink shufflevector to users. -define <8 x i16> @sink_shufflevector_umull(<16 x i8> %a, <16 x i8> %b) { +define <8 x i16> @sink_shufflevector_umull(<16 x i8> %a, <16 x i8> %b, i1 %c) { ; CHECK-LABEL: @sink_shufflevector_umull( ; CHECK-NEXT: entry: -; CHECK-NEXT: br i1 undef, label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]] +; CHECK-NEXT: br i1 [[C:%.*]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]] ; CHECK: if.then: ; CHECK-NEXT: [[TMP0:%.*]] = shufflevector <16 x i8> [[A:%.*]], <16 x i8> undef, <8 x i32> ; CHECK-NEXT: [[S2:%.*]] = shufflevector <16 x i8> [[B:%.*]], <16 x i8> undef, <8 x i32> @@ -138,7 +138,7 @@ define <8 x i16> @sink_shufflevector_umull(<16 x i8> %a, <16 x i8> %b) { entry: %s1 = shufflevector <16 x i8> %a, <16 x i8> undef, <8 x i32> %s3 = shufflevector <16 x i8> %a, <16 x i8> undef, <8 x i32> - br i1 undef, label %if.then, label %if.else + br i1 %c, label %if.then, label %if.else if.then: %s2 = shufflevector <16 x i8> %b, <16 x i8> undef, <8 x i32> @@ -152,10 +152,10 @@ if.else: } ; The masks used are suitable for umull, sink shufflevector to users. -define <8 x i16> @sink_shufflevector_smull(<16 x i8> %a, <16 x i8> %b) { +define <8 x i16> @sink_shufflevector_smull(<16 x i8> %a, <16 x i8> %b, i1 %c) { ; CHECK-LABEL: @sink_shufflevector_smull( ; CHECK-NEXT: entry: -; CHECK-NEXT: br i1 undef, label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]] +; CHECK-NEXT: br i1 [[C:%.*]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]] ; CHECK: if.then: ; CHECK-NEXT: [[TMP0:%.*]] = shufflevector <16 x i8> [[A:%.*]], <16 x i8> undef, <8 x i32> ; CHECK-NEXT: [[S2:%.*]] = shufflevector <16 x i8> [[B:%.*]], <16 x i8> undef, <8 x i32> @@ -170,7 +170,7 @@ define <8 x i16> @sink_shufflevector_smull(<16 x i8> %a, <16 x i8> %b) { entry: %s1 = shufflevector <16 x i8> %a, <16 x i8> undef, <8 x i32> %s3 = shufflevector <16 x i8> %a, <16 x i8> undef, <8 x i32> - br i1 undef, label %if.then, label %if.else + br i1 %c, label %if.then, label %if.else if.then: %s2 = shufflevector <16 x i8> %b, <16 x i8> undef, <8 x i32> @@ -184,10 +184,10 @@ if.else: } ; Both exts and their shufflevector operands can be sunk. -define <8 x i16> @sink_shufflevector_ext_subadd(<16 x i8> %a, <16 x i8> %b) { +define <8 x i16> @sink_shufflevector_ext_subadd(<16 x i8> %a, <16 x i8> %b, i1 %c) { ; CHECK-LABEL: @sink_shufflevector_ext_subadd( ; CHECK-NEXT: entry: -; CHECK-NEXT: br i1 undef, label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]] +; CHECK-NEXT: br i1 [[C:%.*]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]] ; CHECK: if.then: ; CHECK-NEXT: [[TMP0:%.*]] = shufflevector <16 x i8> [[A:%.*]], <16 x i8> undef, <8 x i32> ; CHECK-NEXT: [[TMP1:%.*]] = zext <8 x i8> [[TMP0]] to <8 x i16> @@ -208,7 +208,7 @@ entry: %z1 = zext <8 x i8> %s1 to <8 x i16> %s3 = shufflevector <16 x i8> %a, <16 x i8> undef, <8 x i32> %z3 = sext <8 x i8> %s3 to <8 x i16> - br i1 undef, label %if.then, label %if.else + br i1 %c, label %if.then, label %if.else if.then: %s2 = shufflevector <16 x i8> %b, <16 x i8> undef, <8 x i32> @@ -227,13 +227,13 @@ if.else: declare void @user1(<8 x i16>) ; Both exts and their shufflevector operands can be sunk. -define <8 x i16> @sink_shufflevector_ext_subadd_multiuse(<16 x i8> %a, <16 x i8> %b) { +define <8 x i16> @sink_shufflevector_ext_subadd_multiuse(<16 x i8> %a, <16 x i8> %b, i1 %c) { ; CHECK-LABEL: @sink_shufflevector_ext_subadd_multiuse( ; CHECK-NEXT: entry: ; CHECK-NEXT: [[S3:%.*]] = shufflevector <16 x i8> [[A:%.*]], <16 x i8> undef, <8 x i32> ; CHECK-NEXT: [[Z3:%.*]] = sext <8 x i8> [[S3]] to <8 x i16> ; CHECK-NEXT: call void @user1(<8 x i16> [[Z3]]) -; CHECK-NEXT: br i1 undef, label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]] +; CHECK-NEXT: br i1 [[C:%.*]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]] ; CHECK: if.then: ; CHECK-NEXT: [[TMP0:%.*]] = shufflevector <16 x i8> [[A]], <16 x i8> undef, <8 x i32> ; CHECK-NEXT: [[TMP1:%.*]] = zext <8 x i8> [[TMP0]] to <8 x i16> @@ -255,7 +255,7 @@ entry: %s3 = shufflevector <16 x i8> %a, <16 x i8> undef, <8 x i32> %z3 = sext <8 x i8> %s3 to <8 x i16> call void @user1(<8 x i16> %z3) - br i1 undef, label %if.then, label %if.else + br i1 %c, label %if.then, label %if.else if.then: %s2 = shufflevector <16 x i8> %b, <16 x i8> undef, <8 x i32> @@ -272,12 +272,12 @@ if.else: ; The masks used are not suitable for umull, do not sink. -define <8 x i16> @no_sink_shufflevector_umull(<16 x i8> %a, <16 x i8> %b) { +define <8 x i16> @no_sink_shufflevector_umull(<16 x i8> %a, <16 x i8> %b, i1 %c) { ; CHECK-LABEL: @no_sink_shufflevector_umull( ; CHECK-NEXT: entry: ; CHECK-NEXT: [[S1:%.*]] = shufflevector <16 x i8> [[A:%.*]], <16 x i8> undef, <8 x i32> ; CHECK-NEXT: [[S3:%.*]] = shufflevector <16 x i8> [[A]], <16 x i8> undef, <8 x i32> -; CHECK-NEXT: br i1 undef, label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]] +; CHECK-NEXT: br i1 [[C:%.*]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]] ; CHECK: if.then: ; CHECK-NEXT: [[S2:%.*]] = shufflevector <16 x i8> [[B:%.*]], <16 x i8> undef, <8 x i32> ; CHECK-NEXT: [[VMULL0:%.*]] = tail call <8 x i16> @llvm.aarch64.neon.umull.v8i16(<8 x i8> [[S1]], <8 x i8> [[S2]]) @@ -290,7 +290,7 @@ define <8 x i16> @no_sink_shufflevector_umull(<16 x i8> %a, <16 x i8> %b) { entry: %s1 = shufflevector <16 x i8> %a, <16 x i8> undef, <8 x i32> %s3 = shufflevector <16 x i8> %a, <16 x i8> undef, <8 x i32> - br i1 undef, label %if.then, label %if.else + br i1 %c, label %if.then, label %if.else if.then: %s2 = shufflevector <16 x i8> %b, <16 x i8> undef, <8 x i32> diff --git a/llvm/test/Transforms/CodeGenPrepare/ARM/sink-free-instructions-inseltpoison.ll b/llvm/test/Transforms/CodeGenPrepare/ARM/sink-free-instructions-inseltpoison.ll index bc813d7..f9d702c 100644 --- a/llvm/test/Transforms/CodeGenPrepare/ARM/sink-free-instructions-inseltpoison.ll +++ b/llvm/test/Transforms/CodeGenPrepare/ARM/sink-free-instructions-inseltpoison.ll @@ -170,14 +170,14 @@ if.else: declare void @user1(<8 x i16>) ; Exts can be sunk. -define <8 x i16> @sink_shufflevector_ext_subadd_multiuse(<16 x i8> %a, <16 x i8> %b) { +define <8 x i16> @sink_shufflevector_ext_subadd_multiuse(<16 x i8> %a, <16 x i8> %b, i1 %c) { ; NEON-LABEL: @sink_shufflevector_ext_subadd_multiuse( ; NEON-NEXT: entry: ; NEON-NEXT: [[S1:%.*]] = shufflevector <16 x i8> [[A:%.*]], <16 x i8> poison, <8 x i32> ; NEON-NEXT: [[S3:%.*]] = shufflevector <16 x i8> [[A]], <16 x i8> poison, <8 x i32> ; NEON-NEXT: [[Z3:%.*]] = sext <8 x i8> [[S3]] to <8 x i16> ; NEON-NEXT: call void @user1(<8 x i16> [[Z3]]) -; NEON-NEXT: br i1 undef, label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]] +; NEON-NEXT: br i1 [[C:%.*]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]] ; NEON: if.then: ; NEON-NEXT: [[S2:%.*]] = shufflevector <16 x i8> [[B:%.*]], <16 x i8> poison, <8 x i32> ; NEON-NEXT: [[TMP0:%.*]] = zext <8 x i8> [[S1]] to <8 x i16> @@ -198,7 +198,7 @@ define <8 x i16> @sink_shufflevector_ext_subadd_multiuse(<16 x i8> %a, <16 x i8> ; NONEON-NEXT: [[S3:%.*]] = shufflevector <16 x i8> [[A]], <16 x i8> poison, <8 x i32> ; NONEON-NEXT: [[Z3:%.*]] = sext <8 x i8> [[S3]] to <8 x i16> ; NONEON-NEXT: call void @user1(<8 x i16> [[Z3]]) -; NONEON-NEXT: br i1 undef, label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]] +; NONEON-NEXT: br i1 [[C:%.*]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]] ; NONEON: if.then: ; NONEON-NEXT: [[S2:%.*]] = shufflevector <16 x i8> [[B:%.*]], <16 x i8> poison, <8 x i32> ; NONEON-NEXT: [[Z2:%.*]] = zext <8 x i8> [[S2]] to <8 x i16> @@ -216,7 +216,7 @@ entry: %s3 = shufflevector <16 x i8> %a, <16 x i8> poison, <8 x i32> %z3 = sext <8 x i8> %s3 to <8 x i16> call void @user1(<8 x i16> %z3) - br i1 undef, label %if.then, label %if.else + br i1 %c, label %if.then, label %if.else if.then: %s2 = shufflevector <16 x i8> %b, <16 x i8> poison, <8 x i32> diff --git a/llvm/test/Transforms/CodeGenPrepare/ARM/sink-free-instructions.ll b/llvm/test/Transforms/CodeGenPrepare/ARM/sink-free-instructions.ll index 990fb80..2a43233 100644 --- a/llvm/test/Transforms/CodeGenPrepare/ARM/sink-free-instructions.ll +++ b/llvm/test/Transforms/CodeGenPrepare/ARM/sink-free-instructions.ll @@ -170,14 +170,14 @@ if.else: declare void @user1(<8 x i16>) ; Exts can be sunk. -define <8 x i16> @sink_shufflevector_ext_subadd_multiuse(<16 x i8> %a, <16 x i8> %b) { +define <8 x i16> @sink_shufflevector_ext_subadd_multiuse(<16 x i8> %a, <16 x i8> %b, i1 %c) { ; NEON-LABEL: @sink_shufflevector_ext_subadd_multiuse( ; NEON-NEXT: entry: ; NEON-NEXT: [[S1:%.*]] = shufflevector <16 x i8> [[A:%.*]], <16 x i8> undef, <8 x i32> ; NEON-NEXT: [[S3:%.*]] = shufflevector <16 x i8> [[A]], <16 x i8> undef, <8 x i32> ; NEON-NEXT: [[Z3:%.*]] = sext <8 x i8> [[S3]] to <8 x i16> ; NEON-NEXT: call void @user1(<8 x i16> [[Z3]]) -; NEON-NEXT: br i1 undef, label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]] +; NEON-NEXT: br i1 [[C:%.*]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]] ; NEON: if.then: ; NEON-NEXT: [[S2:%.*]] = shufflevector <16 x i8> [[B:%.*]], <16 x i8> undef, <8 x i32> ; NEON-NEXT: [[TMP0:%.*]] = zext <8 x i8> [[S1]] to <8 x i16> @@ -198,7 +198,7 @@ define <8 x i16> @sink_shufflevector_ext_subadd_multiuse(<16 x i8> %a, <16 x i8> ; NONEON-NEXT: [[S3:%.*]] = shufflevector <16 x i8> [[A]], <16 x i8> undef, <8 x i32> ; NONEON-NEXT: [[Z3:%.*]] = sext <8 x i8> [[S3]] to <8 x i16> ; NONEON-NEXT: call void @user1(<8 x i16> [[Z3]]) -; NONEON-NEXT: br i1 undef, label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]] +; NONEON-NEXT: br i1 [[C:%.*]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]] ; NONEON: if.then: ; NONEON-NEXT: [[S2:%.*]] = shufflevector <16 x i8> [[B:%.*]], <16 x i8> undef, <8 x i32> ; NONEON-NEXT: [[Z2:%.*]] = zext <8 x i8> [[S2]] to <8 x i16> @@ -216,7 +216,7 @@ entry: %s3 = shufflevector <16 x i8> %a, <16 x i8> undef, <8 x i32> %z3 = sext <8 x i8> %s3 to <8 x i16> call void @user1(<8 x i16> %z3) - br i1 undef, label %if.then, label %if.else + br i1 %c, label %if.then, label %if.else if.then: %s2 = shufflevector <16 x i8> %b, <16 x i8> undef, <8 x i32> diff --git a/llvm/test/Transforms/CodeGenPrepare/X86/pr35658.ll b/llvm/test/Transforms/CodeGenPrepare/X86/pr35658.ll index b107fa5..eec9475 100644 --- a/llvm/test/Transforms/CodeGenPrepare/X86/pr35658.ll +++ b/llvm/test/Transforms/CodeGenPrepare/X86/pr35658.ll @@ -13,7 +13,7 @@ entry: for.body: ; preds = %for.body, %entry %e.03 = phi ptr [ @gv, %entry ], [ %arrayidx1, %for.body ] %tobool = icmp eq i16 undef, 0 - br i1 undef, label %for.body, label %for.end + br i1 %tobool, label %for.body, label %for.end for.end: ; preds = %for.body ; CHECK: sunkaddr diff --git a/llvm/test/Transforms/CodeGenPrepare/X86/split-indirect-loop.ll b/llvm/test/Transforms/CodeGenPrepare/X86/split-indirect-loop.ll index 34f89dd..c5d18ff 100644 --- a/llvm/test/Transforms/CodeGenPrepare/X86/split-indirect-loop.ll +++ b/llvm/test/Transforms/CodeGenPrepare/X86/split-indirect-loop.ll @@ -10,12 +10,12 @@ ; CHECK: while.body.clone: ; CHECK: br label %.split -define void @test() { +define void @test(i1 %c) { entry: br label %if.else if.else: - br i1 undef, label %while.body, label %preheader + br i1 %c, label %while.body, label %preheader preheader: br label %if.else1 diff --git a/llvm/test/Transforms/CodeGenPrepare/X86/switch-phi-const.ll b/llvm/test/Transforms/CodeGenPrepare/X86/switch-phi-const.ll index fd31900..24b046b 100644 --- a/llvm/test/Transforms/CodeGenPrepare/X86/switch-phi-const.ll +++ b/llvm/test/Transforms/CodeGenPrepare/X86/switch-phi-const.ll @@ -86,10 +86,10 @@ default: ret void } -define void @switch_phi_const_multiple_phis(i32 %x) { +define void @switch_phi_const_multiple_phis(i32 %x, i1 %c) { ; CHECK-LABEL: @switch_phi_const_multiple_phis( ; CHECK-NEXT: bb0: -; CHECK-NEXT: br i1 undef, label [[BB1:%.*]], label [[CASE_13:%.*]] +; CHECK-NEXT: br i1 [[C:%.*]], label [[BB1:%.*]], label [[CASE_13:%.*]] ; CHECK: bb1: ; CHECK-NEXT: [[COND:%.*]] = icmp eq i32 [[X:%.*]], 13 ; CHECK-NEXT: br i1 [[COND]], label [[CASE_13]], label [[DEFAULT:%.*]] @@ -105,7 +105,7 @@ define void @switch_phi_const_multiple_phis(i32 %x) { ; CHECK-NEXT: ret void ; bb0: - br i1 undef, label %bb1, label %case_13 + br i1 %c, label %bb1, label %case_13 bb1: switch i32 %x, label %default [ @@ -127,10 +127,10 @@ default: ret void } -define void @switch_phi_const_degenerate() { +define void @switch_phi_const_degenerate(i1 %c) { ; CHECK-LABEL: @switch_phi_const_degenerate( ; CHECK-NEXT: bb0: -; CHECK-NEXT: br i1 undef, label [[CASE_42:%.*]], label [[BB1:%.*]] +; CHECK-NEXT: br i1 [[C:%.*]], label [[CASE_42:%.*]], label [[BB1:%.*]] ; CHECK: bb1: ; CHECK-NEXT: br label [[CASE_42]] ; CHECK: case_42: @@ -139,7 +139,7 @@ define void @switch_phi_const_degenerate() { ; CHECK-NEXT: ret void ; bb0: - br i1 undef, label %case_42, label %bb1 + br i1 %c, label %case_42, label %bb1 bb1: switch i32 42, label %unreachable [ -- 2.7.4