From 02880e7803b19c357718abd2f0d567b4a761f318 Mon Sep 17 00:00:00 2001 From: Ju-Zhe Zhong Date: Mon, 13 Mar 2023 22:17:57 +0800 Subject: [PATCH] RISC-V: Use reg_or_subregno to check regno [PR109092] gcc/ChangeLog: PR target/109092 * config/riscv/riscv.md: Fix subreg bug. --- gcc/config/riscv/riscv.md | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md index 863400c..bc384d9 100644 --- a/gcc/config/riscv/riscv.md +++ b/gcc/config/riscv/riscv.md @@ -1369,8 +1369,8 @@ (zero_extend:DI (match_operand:SI 1 "nonimmediate_operand" " r,m")))] "TARGET_64BIT && !TARGET_ZBA - && !(REG_P (operands[1]) - && REGNO (operands[1]) == VL_REGNUM)" + && !(register_operand (operands[1], SImode) + && reg_or_subregno (operands[1]) == VL_REGNUM)" "@ # lwu\t%0,%1" @@ -1752,7 +1752,7 @@ "(register_operand (operands[0], SImode) || reg_or_0_operand (operands[1], SImode)) && !(register_operand (operands[1], SImode) - && REGNO (operands[1]) == VL_REGNUM)" + && reg_or_subregno (operands[1]) == VL_REGNUM)" { return riscv_output_move (operands[0], operands[1]); } [(set_attr "move_type" "move,const,load,store,mtc,fpload,mfc,fpstore,rdvlenb") (set_attr "mode" "SI") -- 2.7.4